US6908785B2
Expired / Lapsed
US
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Multi-chip package (MCP) with a conductive bar and method for manufacturing the same
Assignee: Samsung Electronics Co Ltd
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Filing: 2002-11-27
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Granted: 2005-06-21
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Expires: 2022-11-27
Abstract
Abstract A multi-chip package (MCP) is provided. The MCP comprises a plurality of stacked semiconductor chips, each including a chip pad and a first insulating layer overlying the chip pad with an opening to expose a portion of the chip pad. Each chip additionally includes a pad redistribution line formed on the first insulating layer and a second insulating layer covering the pad redistribution line. A via hole is formed through the chip, the first insulating layer, a pad redistribution line and the second insulating layer. The MCP further includes a protective layer formed on the bottom of the lowest semiconductor chip. The protective layer includes a conductive pad formed opposite the bottom of the lowest semiconductor chip. A conductive bar extends through the via holes of the stacked semiconductor chips, from the conductive pad, and is electrically connected to the pad redistribution line of the stacked semiconductor chips.
Inventors
- 👤 Gu-Sung Kim
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-09 10:56
CPC Classifications
H; H10; H10W; H10W74/00; H10W74/10; H10W74/111; H10W74/129; H10W20/00; H10W20/01; H10W20/021; H10W20/023; H10W20/0238; H10W20/0242; H10W20/0261; H10W20/20; H10W70/00; H10W70/099; H10W90/00; H10W70/60; H10W70/62; H10W70/65; H10W70/654; H10W70/655; H10W72/00; H10W72/01; H10W72/019; H10W72/20; H10W72/241; H10W72/244; H10W72/29; H10W72/90; H10W72/921; H10W72/922; H10W72/9223; H10W72/923; H10W72/941; H10W72/9415; H10W72/942; H10W90/20; H10W90/22; H10W90/701; H10W90/721; H10W90/722; H10W90/731; H10W90/732; H10W99/00
Claims Analysis
Total Claims: 24
Claim 1
Independent Claim
94 words
A method for manufacturing a MCP, the method comprising: forming a first insulating layer on a semiconductor chip having a chip pad, the first insulating layer having an opening to expose a portion of the chip pad; forming a pad redistribution line an the first insulating layer, the pad redistribution line electrically connected to the chip pad; forming a second insulating layer on the first insulating layer to cover the pad redistribution line; forming a via hole extending through tho chip, the first insulating layer, a pad redistribution pattern and the second insulating layer.
Claim 2
Independent Claim
94 words
A method for manufacturing a MCP, the method comprising: forming a first insulating layer on a semiconductor chip having a chip pad, the first insulating layer having an opening to expose a portion of the chip pad; forming a pad redistribution line an the first insulating layer, the pad redistribution line electrically connected to the chip pad; forming a second insulating layer on the first insulating layer to cover the pad redistribution line; forming a via hole extending through tho chip, the first insulating layer, a pad redistribution pattern and the second insulating layer.
Claim 3
Dependent Claim
26 words
The method of claim 1 , further comprising back lapping to reduce a total thickness of the MCP by thinning the bottom of the semiconductor chip.
Claim 4
Dependent Claim
72 words
The method of claim 1 , wherein the forming a via hole comprises: forming a photosensitive layer on both sides of the semiconductor chip; forming a hole in the photosensitive layer at the bottom of the semiconductor chip corresponding to a portion of the pad redistribution line to form a mask; and penetrating through the chip, the first insulating layer, a pad redistribution pattern and the second insulating layer, using the mask.
Claim 5
Dependent Claim
15 words
The method of claim 3 , wherein the penetrating comprises sputtering using a high-density plasma.
Claim 6
Dependent Claim
17 words
The method of claim 3 , further comprising wet etching to remove burr of the via hole.
Claim 7
Dependent Claim
13 words
A The method of claim 3 , further comprising removing the photosensitive layers.
Claim 8
Independent Claim
73 words
A method for forming a substrate for manufacturing an MCP having a plurality of stacked semiconductor chips, the method comprising: forming a polymer layer on one side of a substrate; forming a conductive pad overlying the polymer layer; forming a protective layer overlying the conductive pad; forming a first opening in the protective layer to expose a portion of the conductive pad; and forming a conductive bar extending upwardly from the conductive pad.
Claim 9
Independent Claim
73 words
A method for forming a substrate for manufacturing an MCP having a plurality of stacked semiconductor chips, the method comprising: forming a polymer layer on one side of a substrate; forming a conductive pad overlying the polymer layer; forming a protective layer overlying the conductive pad; forming a first opening in the protective layer to expose a portion of the conductive pad; and forming a conductive bar extending upwardly from the conductive pad.
Claim 10
Dependent Claim
68 words
The method of claim 7 , where the forming a conductive bar comprises: forming a photoresist layer on the protective layer to a thickness corresponding to a total thickness of the stacked semiconductor chips; forming a second opening in the photoresist layer to expose the portion of the conductive pad, forming the conductive bar by filling the second opening with a conductive material, and removing the photoresist layer.
Claim 11
Dependent Claim
12 words
The method of claim 7 , wherein the protective layer comprises polyimide.
Claim 12
Dependent Claim
12 words
The method of claim 9 , further comprising hard-curing the protective layer.
Claim 13
Dependent Claim
21 words
The method of claim 7 , further comprising forming a metal seed layer on the substrate before forming the conductive pad.
Claim 14
Dependent Claim
14 words
The method of claim 7 , wherein the polymer layer comprises a photosensitive polymer.
Claim 15
Independent Claim
194 words
A method for forming a MCP, wherein the MCP comprises a plurality of stacked semiconductor chips, each chip including a chip pad on a main surface thereof; a first insulating layer overlying the chip pad, the first insulating layer having an opening to expose a portion of the chip pad; a pad redistribution line formed on the first insulating layer, a second insulating layer covering the pad redistribution line, wherein a via hole is formed through the chip, the first insulating layer, a pad redistribution line and the second insulating layer, the method comprising; forming a polymer layer on one side of a substrate; forming a conductive pad overlying the polymer layer; forming a protective layer overlying the conductive pad; forming an opening in the protective layer to expose a portion of the conductive pad; and forming a conductive bar extending upwardly from the conductive pad; inserting the conductive bar into the via holes and stacking the plurality of the semiconductor chips on the substrate such that the conductive bar extends through the via holes of the stacked semiconductor chips, from the conductive pad; electrically connecting the conductive bar to the pad redistribution line.
Claim 16
Independent Claim
194 words
A method for forming a MCP, wherein the MCP comprises a plurality of stacked semiconductor chips, each chip including a chip pad on a main surface thereof; a first insulating layer overlying the chip pad, the first insulating layer having an opening to expose a portion of the chip pad; a pad redistribution line formed on the first insulating layer, a second insulating layer covering the pad redistribution line, wherein a via hole is formed through the chip, the first insulating layer, a pad redistribution line and the second insulating layer, the method comprising; forming a polymer layer on one side of a substrate; forming a conductive pad overlying the polymer layer; forming a protective layer overlying the conductive pad; forming an opening in the protective layer to expose a portion of the conductive pad; and forming a conductive bar extending upwardly from the conductive pad; inserting the conductive bar into the via holes and stacking the plurality of the semiconductor chips on the substrate such that the conductive bar extends through the via holes of the stacked semiconductor chips, from the conductive pad; electrically connecting the conductive bar to the pad redistribution line.
Claim 17
Dependent Claim
26 words
The method of claim 13 , further comprising: removing the substrate and the photosensitive polymer layer; and attaching an external connection terminal to the conductive pad.
Claim 18
Dependent Claim
27 words
The method of claim 13 , wherein the electrically connecting the conductive bar to the pad redistribution line comprises forming a plating layer on the conductive bar.
Claim 19
Dependent Claim
35 words
The method of claim 13 , wherein the protective layer is attached to the bottom of the lowest semiconductor chip, the protective layer including the conductive pad opposite the bottom of the lowest semiconductor chip.
Claim 20
Dependent Claim
16 words
The method of claim 13 , further comprising forming a coating layer on the conductive pad.
Claim 21
Dependent Claim
18 words
The method of claim 17 , wherein the coating layer is formed by a Ni electroless plating method.
Claim 22
Dependent Claim
17 words
The method of claim 13 , further comprising: attaching a cap layer to the uppermost semiconductor chip.
Claim 23
Dependent Claim
13 words
The method of claim 13 , wherein the substrate is a glass substrate.
Claim 24
Dependent Claim
14 words
The method a claim 17 , wherein the glass substrate is made of sapphire.
References Cited (Backward Citations)
US5432999A
Cited
JPH06291250A
Cited
US5457879A
Cited
US5481133A
Cited
JPH08264712A
Cited
US5781415A
Cited
US5917388A
Cited
US6664616B2
Cited
JPH10163411A
Cited
JP2000260933A
Cited
US6444576B1
Cited
US6577013B1
Cited
US6727115B2
Cited
US6727116B2
Cited
US20040115863A1
Cited
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| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
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| 3.5 Years (Year 4) | 2008-06-20 | 2008-12-20 | 2009-06-21 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2012-06-20 | 2012-12-20 | 2013-06-21 | $3760.00 | Window Closed / Lapsed |
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