Patent US6895040B2 successfully refreshed from Google Patents.
US6895040B2
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Architecture for a digital subscriber line analog front end
Assignee: Silicon Laboratories Inc
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Filing: 2001-05-01
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Granted: 2005-05-17
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Expires: 2021-05-01
Abstract
Abstract An analog front end for communicating discrete multitone modulated signals on a subscriber line includes a transmit block, a receive block, and a hybrid packaged within a same integrated circuit. Upstream data to be transmitted to the subscriber line is pre-processed to eliminate even images. A power spectral density shaping filter subsequently substantially eliminates undesired energy in the upstream data signal. A high pass filter further rejects upstream data from the downstream data signal. The power spectral density filter and the high pass filter enable the use of a first order hybrid network for extracting the downstream data. The analog front end may include an additional analog channel to enable voiceband (e.g., v.90) communication concurrent with non-voiceband (e.g., xDSL) operation. Sample rate conversion is utilized to avoid the use of multiple independent clocks for otherwise incompatible clocking requirements.
Inventors
- 👤 Yan Zhou
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-30 17:01
CPC Classifications
H; H04; H04B; H04B3/00; H04B3/02; H04B3/20; H04B3/23; H04L; H04L27/00; H04L27/0002; H04M; H04M11/00; H04M11/06; H04M11/062
Claims Analysis
Total Claims: 12
Claim 1
Independent Claim
80 words
An analog front end apparatus, comprising: a) a transmit block coupled to transmit discrete multitone modulated upstream data to a subscriber line, wherein the transmit block digitally filters the upstream data; b) a hybrid network coupled to the subscriber line and the transmit block; and c) a receive block coupled to the hybrid for receiving discrete multitone modulated downstream data from the subscriber line, wherein the transmit block, hybrid network, and receive block reside within a same integrated circuit package.
Claim 2
Dependent Claim
80 words
An analog front end apparatus, comprising: a) a transmit block coupled to transmit discrete multitone modulated upstream data to a subscriber line, wherein the transmit block digitally filters the upstream data; b) a hybrid network coupled to the subscriber line and the transmit block; and c) a receive block coupled to the hybrid for receiving discrete multitone modulated downstream data from the subscriber line, wherein the transmit block, hybrid network, and receive block reside within a same integrated circuit package.
Claim 3
Dependent Claim
14 words
The apparatus of claim 1 wherein the hybrid is a first order hybrid network.
Claim 4
Dependent Claim
10 words
The apparatus of claim 1 wherein the hybrid is tunable.
Claim 5
Dependent Claim
22 words
The apparatus of claim 1 wherein the hybrid is DC isolated from the transmit and receive blocks of the analog front end.
Claim 6
Dependent Claim
77 words
The apparatus of claim 1 wherein the transmit block further comprises: i) a first interpolator coupled to interpolate the upstream data from a first clock rate to a second clock rate greater than the first clock rate; ii) a power spectral density shaping filter coupled to shape the power spectrum of the interpolated upstream data; and iii) a second interpolator coupled to interpolate the shaped signal to a third clock rate greater than the second clock rate.
Claim 7
Dependent Claim
10 words
The method of claim 5 wherein c 2 =1.104 MHz.
Claim 8
Dependent Claim
10 words
The method of claim 5 wherein c 3 =35.328 MHz.
Claim 9
Dependent Claim
31 words
The apparatus of claim 1 wherein the transmit block, hybrid network, and receive block are fabricated on a same integrated substrate to form a complementary metal oxide semiconductor (CMOS) integrated circuit.
Claim 10
Independent Claim
79 words
A method comprising the steps of: a) receiving a discrete multitone modulated upstream data signal at a first clock rate, c 1 ; b) interpolating the upstream signal to a second clock rate c 2 >c 1 ; c) processing the interpolated signal through a power shaping power spectral density shaping filter; d) interpolating the power shaped signal to a third clock rate c 3 >c 2 ; and e) converting the twice interpolated signal to an analog signal.
Claim 11
Independent Claim
79 words
A method comprising the steps of: a) receiving a discrete multitone modulated upstream data signal at a first clock rate, c 1 ; b) interpolating the upstream signal to a second clock rate c 2 >c 1 ; c) processing the interpolated signal through a power shaping power spectral density shaping filter; d) interpolating the power shaped signal to a third clock rate c 3 >c 2 ; and e) converting the twice interpolated signal to an analog signal.
Claim 12
Dependent Claim
21 words
The method of claim 9 further comprising the step of pre-processing the received upstream data signal to substantially eliminate even images.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2008-05-16 | 2008-11-15 | 2009-05-17 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2012-05-16 | 2012-11-15 | 2013-05-17 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2016-05-16 | 2016-11-15 | 2017-05-17 | $7700.00 | Window Closed / Lapsed |