US6281829B1
Expired / Lapsed
US
⏱️ 0.0 years remaining
Multi-mode analog front-end
Assignee: Ikanos Communications Inc
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Filing: 1999-08-27
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Granted: 2001-08-28
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Expires: 2019-08-27
Abstract
Abstract In general, the multi-mode analog front-end provides an internal line driver and hybrid, as well as numerous functions, in order to provide a close to optimum solution for all digital subscriber line applications. The functions provided for by the analog front-end include; programmable hybrid attenuation; onboard amplifiers for driving external transmit and receive filters; a line driver with programmable drive and gain; programmable RC-filters capable of calibration via an internal loop-back under digital control; a programmable switched-capacitor filter for tracking the over sampling rate used by a digital signal processor; internal testing functions; a high frequency boost circuit; a dual input peak detector; selectable data rates; and a programmable data interface. The analog front-end allows for use of particular blocks within the analog front-end particular to the functions necessary to compensate for a particular digital subscriber line application.
Inventors
- 👤 Daniel Amrany
- 👤 Arnold Muralt
- 👤 Frode Larsen
- 👤 Sam Olu George
- 👤 Nianxiong Tan
- 👤 Min Shen
- 👤 Peter D. Keller
- 👤 Jung-lung Lin
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-30 08:54
CPC Classifications
H; H04; H04L; H04L27/00; H04L27/0002
Claims Analysis
Total Claims: 17
Claim 1
Independent Claim
101 words
A method of accommodating different digital subscriber line applications by a single analog front-end circuit, comprising the steps of: driving a line; attenuating said transmit signal from said receive signal upon reception of said receive signal; amplifying said attenuated receive signal; changing a data rate of said analog front-end circuit dependent upon said different digital subscriber line applications; and dividing a clock signal for use by said analog front-end circuit, such that converting a first analog signal into a first digital signal may be performed at a different sampling rate than converting a second digital signal into a second analog signal.
Claim 2
Independent Claim
101 words
A method of accommodating different digital subscriber line applications by a single analog front-end circuit, comprising the steps of: driving a line; attenuating said transmit signal from said receive signal upon reception of said receive signal; amplifying said attenuated receive signal; changing a data rate of said analog front-end circuit dependent upon said different digital subscriber line applications; and dividing a clock signal for use by said analog front-end circuit, such that converting a first analog signal into a first digital signal may be performed at a different sampling rate than converting a second digital signal into a second analog signal.
Claim 3
Dependent Claim
13 words
The method of claim 1 , wherein said line is a two-wire pair.
Claim 4
Dependent Claim
28 words
The method of claim 1 , wherein said step of amplifying said attenuated receive signal is defined by a peak detector which predefines a maximum amount of amplification.
Claim 5
Dependent Claim
34 words
The method of claim 1 , further comprising the step of externally filtering a transmit signal and a receive signal if said transmit signal and said receive signal are on a different frequency band.
Claim 6
Dependent Claim
22 words
The method of claim 1 , further comprising the step of calibrating said analog front-end circuit internal to said analog front-end circuit.
Claim 7
Dependent Claim
25 words
The method of claim 1 , further comprising the step of amplifying a portion of said receive signal, wherein said portion has a high frequency.
Claim 8
Dependent Claim
27 words
The method of claim 1 , further comprising the step of driving external filters, which perform said step of externally filtering said receive and said transmit signals.
Claim 9
Dependent Claim
13 words
The method of claim 1 , wherein said line is a two-wire pair.
Claim 10
Dependent Claim
32 words
The method of claim 1 , further comprising the step of further amplifying said amplified attenuated receive signal until said receive signal is capable of being used by a digital signal processor.
Claim 11
Dependent Claim
36 words
The method of claim 1 , further comprising the step of tracking an over sampling ratio of a digital signal processor, thereby providing optimum performance of a wide range of bandwidths used by said transmit signal.
Claim 12
Dependent Claim
104 words
A multi-mode analog front-end integrated circuit for digital subscriber line applications, comprising: a line driver formed in a portion of the integrated circuit and disposed to transmit signals to a local loop; a programmable gain amplifier formed in a portion of the integrated circuit, operatively coupled to the line driver, and disposed to receive signals from the local loop, the programmable gain amplifier including a hybrid portion configured to de-couple the received signals, the programmable gain amplifier further including an amplifier portion, wherein the programmable gain amplifier is configured to remove transmitted signals from the received signals by adjusting a gain of the hybrid.
Claim 13
Dependent Claim
104 words
A multi-mode analog front-end integrated circuit for digital subscriber line applications, comprising: a line driver formed in a portion of the integrated circuit and disposed to transmit signals to a local loop; a programmable gain amplifier formed in a portion of the integrated circuit, operatively coupled to the line driver, and disposed to receive signals from the local loop, the programmable gain amplifier including a hybrid portion configured to de-couple the received signals, the programmable gain amplifier further including an amplifier portion, wherein the programmable gain amplifier is configured to remove transmitted signals from the received signals by adjusting a gain of the hybrid.
Claim 14
Dependent Claim
33 words
The multi-mode analog front-end integrated circuit of claim 11 , further including a testing device for monitoring and rerouting an internal analog signal within said analog front end to at least one port.
Claim 15
Dependent Claim
35 words
The multi-mode front-end integrated circuit of claim 11 , further comprising a programmable data interface, wherein said interface changes a data rate at which said analog front-end circuit receives data from a digital signal processor.
Claim 16
Dependent Claim
149 words
A multi-mode analog front-end integrated circuit for digital subscriber line applications, comprising: a line driver formed in a portion of the integrated circuit; a hybrid formed in a portion of the integrated circuit and operatively coupled to the line driver; and at least two components selected from the group consisting of: an amplifier for amplifying a signal received by the hybrid, a digital to analog converter, an analog to digital converter for converting the amplified receive signal, a clock signal divider for dividing a clock speed for the analog front-end integrated circuit allowing said analog to digital conversion and said digital to analog conversion to be performed at different clock speeds, and a switched capacitor filter having a programmable cut-off frequency which tracks an over sampling ratio utilized by a digital signal processor; and a digital control interface configured to switch on and off the at least two components.
Claim 17
Dependent Claim
149 words
A multi-mode analog front-end integrated circuit for digital subscriber line applications, comprising: a line driver formed in a portion of the integrated circuit; a hybrid formed in a portion of the integrated circuit and operatively coupled to the line driver; and at least two components selected from the group consisting of: an amplifier for amplifying a signal received by the hybrid, a digital to analog converter, an analog to digital converter for converting the amplified receive signal, a clock signal divider for dividing a clock speed for the analog front-end integrated circuit allowing said analog to digital conversion and said digital to analog conversion to be performed at different clock speeds, and a switched capacitor filter having a programmable cut-off frequency which tracks an over sampling ratio utilized by a digital signal processor; and a digital control interface configured to switch on and off the at least two components.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2004-08-27 | 2005-02-26 | 2005-08-28 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2008-08-27 | 2009-02-26 | 2009-08-28 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2012-08-27 | 2013-02-26 | 2013-08-28 | $7700.00 | Window Closed / Lapsed |