US6864752B2
Expired / Lapsed
US
⏱️ 0.0 years remaining
Configurable voltage controlled oscillator system and method
Assignee: Avago Technologies International Sales Pte Ltd
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Filing: 2003-05-22
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Granted: 2005-03-08
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Expires: 2023-05-22
Abstract
Abstract A phase lock loop with multiple divider paths is presented herein. The phase lock loop can be used to provide a wide range of frequencies. The phase lock loop can also be used as a portion of a clock multiplier unit or a clock data and recovery unit.
Inventors
- 👤 Mario Caresosa
- 👤 Namik Kocaman
- 👤 Afshin Momtaz
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-29 17:23
CPC Classifications
H; H04; H04J; H04J3/00; H04J3/02; H04J3/06; H04J3/0635; H04J3/0685; H03; H03L; H03L7/00; H03L7/06; H03L7/08; H03L7/099; H03L7/0995; H03L7/0998; H03L7/16; H03L7/18; H04J3/04; H04J3/047; H04J2203/00; H04J2203/0001; H04J2203/0089
Claims Analysis
Total Claims: 12
Claim 1
Independent Claim
59 words
A phase lock loop comprising: a phase detector; a voltage controlled oscillator connected to the phase detector; a plurality of divider paths connected to said voltage controlled oscillator; a multiplexer connected to said plurality of divider paths and said phase detector; and at least one divider forming a portion of two or more of the plurality of divider paths.
Claim 2
Dependent Claim
59 words
A phase lock loop comprising: a phase detector; a voltage controlled oscillator connected to the phase detector; a plurality of divider paths connected to said voltage controlled oscillator; a multiplexer connected to said plurality of divider paths and said phase detector; and at least one divider forming a portion of two or more of the plurality of divider paths.
Claim 3
Dependent Claim
18 words
The phase lock loop of claim 1 , wherein the voltage controlled oscillator further comprises a ring oscillator.
Claim 4
Dependent Claim
29 words
The phase lock loop of claim 1 , further comprising: a plurality of outputs connected to the divider paths, wherein the outputs provide a corresponding plurality of frequency signals.
Claim 5
Dependent Claim
30 words
The phase lock loop of claim 3 , wherein the plurality of frequency signals comprise: frequency signals for OC- 3 , OC- 12 , OC- 48 , and Gigabit Ethernet.
Claim 6
Dependent Claim
114 words
A phase lock loop system for synchronizing an input signal, said phase lock loop system comprising: a phase detector for comparing phases between the input signal and a feedback signal and providing a control signal, wherein the control signal is dependent on a difference in phase between the input signal and the feedback signal; a voltage controlled oscillator for generating a frequency signal, wherein the frequency signal is dependent on the control signal; a plurality of divider paths for dividing the frequency of the frequency signal; a multiplexer for providing the feedback signal to the phase detector; at least one divider forming a portion of two or more of the plurality of divider paths.
Claim 7
Dependent Claim
114 words
A phase lock loop system for synchronizing an input signal, said phase lock loop system comprising: a phase detector for comparing phases between the input signal and a feedback signal and providing a control signal, wherein the control signal is dependent on a difference in phase between the input signal and the feedback signal; a voltage controlled oscillator for generating a frequency signal, wherein the frequency signal is dependent on the control signal; a plurality of divider paths for dividing the frequency of the frequency signal; a multiplexer for providing the feedback signal to the phase detector; at least one divider forming a portion of two or more of the plurality of divider paths.
Claim 8
Dependent Claim
32 words
The phase lock loop of claim 5 , wherein the multiplexer selects a particular one of the divider paths, and wherein a signal from the selected divider path is the feedback signal.
Claim 9
Dependent Claim
18 words
The phase lock loop of claim 5 , wherein the voltage controlled oscillator further comprises a ring oscillator.
Claim 10
Dependent Claim
23 words
The phase lock loop of claim 5 , further comprising: a plurality of outputs for outputting a corresponding plurality of output frequency signals.
Claim 11
Dependent Claim
34 words
The phase lock loop of claim 8 , wherein the plurality of output frequency signals further comprise an OC- 3 signal, an OC- 12 signal, an OC- 48 signal, and a Gigabit Ethernet signal.
Claim 12
Dependent Claim
29 words
The phase lock loop of claim 8 , further comprising at least one divider for multiplying the frequency of a particular one of the plurality of output frequency signals.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2008-03-07 | 2008-09-06 | 2009-03-08 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2012-03-07 | 2012-09-06 | 2013-03-08 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2016-03-07 | 2016-09-06 | 2017-03-08 | $7700.00 | Window Closed / Lapsed |