US6838327B2
Expired / Lapsed
US
⏱️ 0.0 years remaining
Method for manufacturing semiconductor device having insulating film with N—H bond
Assignee: Pannova Semic LLC
•
Filing: 2003-02-27
•
Granted: 2005-01-04
•
Expires: 2023-02-27
Abstract
Abstract A semiconductor device includes a gate insulating film formed on a silicon substrate, a gate electrode formed on the gate insulating film, and an electrical insulating film formed on the gate electrode. The electrical insulating film includes a N—H bond and substantially no Si—H bond. The electrical insulating film is formed by using tetrachlorosilane (SiCl 4 ) that contains no hydrogen (H) as a source gas for a silicon nitride film. Thus, the semiconductor device can suppress residual hydrogen in the gate insulating film and prevent interface defects of the gate insulating film, a shift in the threshold voltage of a transistor, and the degradation of an on-state current. A method for manufacturing the semiconductor device also is provided.
Inventors
- 👤 Hiroki Sakamoto
- 👤 Yasuhiro Kawasaki
- 👤 Kenji Yoneda
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-29 03:50
CPC Classifications
H; H10; H10D; H10D64/00; H10D64/60; H10D64/66; H10D64/68; H10D64/693; C; C23; C23C; C23C16/00; C23C16/22; C23C16/30; C23C16/34; C23C16/345; H10D64/01; H10D64/013; H10D64/01302; H10D64/01332; H10D64/01336; H10D64/01338; H10D64/667; H10P; H10P14/00; H10P14/60; H10P14/65; H10P14/6516; H10P14/6529; H10D64/01344; H10P14/63; H10P14/6326; H10P14/6328; H10P14/6334; H10P14/69; H10P14/694; H10P14/6943; H10P14/69433
Claims Analysis
Total Claims: 7
Claim 1
Independent Claim
118 words
A method for manufacturing a semiconductor device comprising: forming a gate insulating film on a silicon substrate; forming a deposited film comprising a polysilicon film, a metal film, or laminated structure of polysilicon film and a metal film on the gate insulating film; forming a gate cap insulating film on the deposited film; forming a photoresist pattern on the gate cap insulating film; and forming a gate electrode by using the photoresist pattern as a mask, wherein the gate cap insulating film is formed so as to include a N—H bond and substantially no Si—H bond by decomposition and deposition of a mixture of a gas including substantially no Si—H bond and a gas including a N—H bond.
Claim 2
Independent Claim
118 words
A method for manufacturing a semiconductor device comprising: forming a gate insulating film on a silicon substrate; forming a deposited film comprising a polysilicon film, a metal film, or laminated structure of polysilicon film and a metal film on the gate insulating film; forming a gate cap insulating film on the deposited film; forming a photoresist pattern on the gate cap insulating film; and forming a gate electrode by using the photoresist pattern as a mask, wherein the gate cap insulating film is formed so as to include a N—H bond and substantially no Si—H bond by decomposition and deposition of a mixture of a gas including substantially no Si—H bond and a gas including a N—H bond.
Claim 3
Dependent Claim
17 words
The method according to claim 1 , wherein the electrical insulating film is a silicon nitride film.
Claim 4
Dependent Claim
22 words
The method according to claim 1 , wherein the gas mixture comprises a tetrachlorosilane gas and a gas including a N—H bond.
Claim 5
Dependent Claim
30 words
The method according to claim 3 , wherein the gas including a N—H bond is at least one gas selected from the group consisting of ammonia, dimethylamine, hydrazine, and dimethylhydrazine.
Claim 6
Dependent Claim
34 words
The method according to claim 1 , wherein the gate electrode comprises a polysilicon film implanted with boron ions, a metal film, or a laminated structure of a polysilicon film and a metal film.
Claim 7
Dependent Claim
21 words
The method according to claim 1 , wherein the gate cap insulating film is formed at 700° C. to 800° C.
References Cited (Backward Citations)
GB1184227A
Cited
EP0431878A2
Cited
JPH11261059A
Cited
US6333547B1
Cited
US20020024119A1
Cited
US20020055273A1
Cited
JP2001085426A
Cited
US6355582B1
Cited
US20030222318A1
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2008-01-04 | 2008-07-05 | 2009-01-04 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2012-01-04 | 2012-07-05 | 2013-01-04 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2016-01-04 | 2016-07-05 | 2017-01-04 | $7700.00 | Window Closed / Lapsed |