Semiconductor device having floating gate and method of producing the same

Claim 2

A semiconductor memory device having at least one floating gate comprising: a semiconductor substrate; at least one device-isolation region buried in the semiconductor substrate, having a top surface protruding from a top surface of the semiconductor substrate, the top surface of the device-isolation region having a concave section that has a depression thereon; at least one gate-insulating film formed on the semiconductor substrate; a first gate formed on the gate-insulating film, the device-isolation region and the depression; a gate-to-gate insulating film formed on the first gate and in the concave section and the depression of the device-isolation region; and a second gate formed on the gate-to-gate insulating film, the depression being filled with the second gate, wherein a distance between first side walls of the gate-to-gate insulating film corresponding to the first gate above the depression is larger than a distance between second side walls of the gate-to-gate insulating film corresponding to the concave section below the depression.

Claim 3

The semiconductor memory device according to claim 1 , wherein the first gate is a floating gate, the second gate is a control gate and the gate-to-gate insulating film is an ONO insulating film.

Claim 4

The semiconductor memory device according to claim 1 , wherein the concave section on the top surface of the device-isolation region is lower than the top surface of the semiconductor substrate.

Claim 5

A semiconductor memory device having floating gates comprising: a semiconductor substrate; at least one device-isolation region buried in the semiconductor substrate, having a top surface protruding from a top surface of the semiconductor substrate, the top surface of the device-isolation region having a concave section that has a depression thereon; at least one gate-insulating film formed on the semiconductor substrate; a plurality of first gates formed on the gate-insulating film, the device isolation region and the depression, the first gates being isolated from each other on the device-isolation region; a gate-to-gate insulating film formed on the first gates and in the concave section and the depression of the device isolation region, the first gates being isolated from each other by the gate-to-gate insulating film; and a second gate formed on the gate-to-gate insulating film, the depression being filled with the second gate, wherein a distance between first side walls of the gate-to-gate insulating film corresponding to the first gates above the depression is larger than a distance between second side walls of the gate-to-gate insulating film corresponding to the concave section below the depression.

Claim 6

A semiconductor memory device having floating gates comprising: a semiconductor substrate; at least one device-isolation region buried in the semiconductor substrate, having a top surface protruding from a top surface of the semiconductor substrate, the top surface of the device-isolation region having a concave section that has a depression thereon; at least one gate-insulating film formed on the semiconductor substrate; a plurality of first gates formed on the gate-insulating film, the device isolation region and the depression, the first gates being isolated from each other on the device-isolation region; a gate-to-gate insulating film formed on the first gates and in the concave section and the depression of the device isolation region, the first gates being isolated from each other by the gate-to-gate insulating film; and a second gate formed on the gate-to-gate insulating film, the depression being filled with the second gate, wherein a distance between first side walls of the gate-to-gate insulating film corresponding to the first gates above the depression is larger than a distance between second side walls of the gate-to-gate insulating film corresponding to the concave section below the depression.

Claim 7

A semiconductor memory device according to claim 4 , wherein the device-isolation region is formed such that a bottom surface of the second gate formed in a region, via which the first gates are isolated from each other on the device-isolation region, is lower than a surface of each first gate touching the top surface of the device-isolation region.

Claim 8

A semiconductor memory device according to claim 4 , wherein the distance between the second gate and the gate insulating film is greater than the distance between the second gate and the first gates.

Claim 9

The semiconductor memory device according to claim 4 , wherein each first gate is a floating gate, the second gate is a control gate and the gate-to-gate insulating film is an ONO insulation film.

Claim 10

The semiconductor memory device according to claim 7 further comprising a silicon nitride film formed in the depression of the device-isolation region under the first gates, the silicon nitride film being thicker than the ONO film on the first gates.

Claim 11

The semiconductor memory device according to claim 4 , wherein the concave section on the top surface of the device-isolation region is lower than the top surface of the semiconductor substrate.

Claim 12

The semiconductor memory device according to claim 4 , wherein each first gate has a first polycrystalline silicon layer, having no impurities doped, formed on the gate insulating film and a second polycrystalline silicon layer, having impurities doped, formed on the first polycrystalline silicon layer.