US6586781B2
Expired / Lapsed
US
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Group III nitride based FETs and HEMTs with reduced trapping and method for producing the same
Assignee: MACOM Technology Solutions Holdings Inc
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Filing: 2001-01-29
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Granted: 2003-07-01
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Expires: 2021-01-29
Abstract
Abstract New Group III nitride based field effect transistors and high electron mobility transistors are disclosed that provide enhanced high frequency response characteristics. The preferred transistors are made from GaN/AlGaN and have a dielectric layer on the surface of their conductive channels. The dielectric layer has a high percentage of donor electrons that neutralize traps in the conductive channel such that the traps cannot slow the high frequency response of the transistors. A new method of manufacturing the transistors is also disclosed, with the new method using sputtering to deposit the dielectric layer.
Inventors
- 👤 Yifeng Wu
- 👤 Naiqing Zhang
- 👤 Jian Xu
- 👤 Lee Mc Carthy
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-26 12:11
CPC Classifications
H; H10; H10D; H10D30/00; H10D30/01; H10D30/061; H10D30/0612; H10D30/40; H10D30/47; H10D30/471; H10D30/473; H10D30/4732; H10D30/015; H10D62/00; H10D62/80; H10D62/85; H10D62/8503; H10W; H10W74/00; H10W74/40; H10W74/43
Claims Analysis
Total Claims: 45
Claim 1
Independent Claim
81 words
A field effect transistor (FET), comprising: a high resistivity, non-conducting layer; a barrier layer on said non-conducting layer; respective source, drain and gate contacts contacting said barrier layer, with part of the surface of said barrier layer uncovered by said contacts; and an electron source layer formed on the surface of said barrier layer between said contacts, said electron source layer having a high percentage of donor electrons, said donor electrons allowing said transistor to produce efficient gain at microwave frequencies.
Claim 2
Dependent Claim
81 words
A field effect transistor (FET), comprising: a high resistivity, non-conducting layer; a barrier layer on said non-conducting layer; respective source, drain and gate contacts contacting said barrier layer, with part of the surface of said barrier layer uncovered by said contacts; and an electron source layer formed on the surface of said barrier layer between said contacts, said electron source layer having a high percentage of donor electrons, said donor electrons allowing said transistor to produce efficient gain at microwave frequencies.
Claim 3
Dependent Claim
22 words
The FET of claim 1 , wherein said channel has positive charged surface traps and wherein said donor electrons neutralize said traps.
Claim 4
Dependent Claim
18 words
The FET of claim 2 , wherein said donor electrons have a higher energy state than said traps.
Claim 5
Dependent Claim
17 words
The FET of claim 1 , wherein said electron source layer is a layer of dielectric material.
Claim 6
Dependent Claim
28 words
The FET of claim 1 , wherein said electron source layer has a stable bond with said channel under stresses created by increase electron fields, voltage or temperature.
Claim 7
Dependent Claim
17 words
The FET of claim 1 , wherein the surface of said channel is substantially free of damage.
Claim 8
Dependent Claim
25 words
The FET of claim 1 , wherein the forming of said electron source layer causes substantially no damage to the surface of said barrier layer.
Claim 9
Dependent Claim
14 words
The FET of claim 1 , wherein said electron source layer comprises silicon nitride.
Claim 10
Dependent Claim
27 words
The FET of claim 1 , further comprising a substrate of sapphire or silicon carbide, said substrate being adjacent to said non-conducting layer, opposite said barrier layer.
Claim 11
Dependent Claim
18 words
The FET of claim 9 , wherein said substrate is formed of a 4H polytype of silicon carbide.
Claim 12
Dependent Claim
18 words
The FET of claim 9 , further comprising a buffer layer between said non-conducting layer and said substrate.
Claim 13
Dependent Claim
24 words
The FET of claim 11 , wherein said buffer layer is made of Al x Ga 1-x N, x being between 0 and 1.
Claim 14
Dependent Claim
22 words
The FET of claim 1 , wherein said non-conducting layer and said barrier layer are made of Group III nitride semiconductor materials.
Claim 15
Dependent Claim
18 words
The FET of claim 1 , wherein said barrier layer is made of Al x Ga 1-x N.
Claim 16
Dependent Claim
22 words
The FET of claim 1 , wherein said barrier layer is made of AlGaN and said non-conducting layer is made of GaN.
Claim 17
Dependent Claim
20 words
The FET of claim 1 , wherein said source and drain contacts comprise an alloy of titanium, aluminum, and nickel.
Claim 18
Dependent Claim
27 words
The FET of claim 1 , wherein said gate is selected from a group consisting of titanium, platinum, chromium, alloys of titanium and tungsten, and platinum silicide.
Claim 19
Dependent Claim
34 words
The FET of claim 1 , wherein said channel has a wider energy bandgap than said non-conducting layer, said FET further comprising a 2 dimensional electron gas (2DEG) between said channel and non-conducting layer.
Claim 20
Dependent Claim
119 words
A high electron mobility transistor (HEMT), comprising: a high resistivity, non-conducting semiconductor layer; a barrier layer on said high resistivity layer, said barrier layer having a wider bandgap than said high resistivity layer; a two dimensional electron gas between said barrier layer and said high resistivity layer; respective source, drain and gate contacts contacting said barrier layer, with part of the surface of said barrier layer uncovered by said contacts; and an electron source layer formed on the surface of said conductive channel between said contacts, said layer having a high percentage of donor electrons, said barrier layer having positively charged traps, said donor electrons neutralizing said traps to allow said HEMT to produce efficient gain at microwave frequencies.
Claim 21
Dependent Claim
119 words
A high electron mobility transistor (HEMT), comprising: a high resistivity, non-conducting semiconductor layer; a barrier layer on said high resistivity layer, said barrier layer having a wider bandgap than said high resistivity layer; a two dimensional electron gas between said barrier layer and said high resistivity layer; respective source, drain and gate contacts contacting said barrier layer, with part of the surface of said barrier layer uncovered by said contacts; and an electron source layer formed on the surface of said conductive channel between said contacts, said layer having a high percentage of donor electrons, said barrier layer having positively charged traps, said donor electrons neutralizing said traps to allow said HEMT to produce efficient gain at microwave frequencies.
Claim 22
Dependent Claim
22 words
The HEMT of claim 19 , wherein said barrier layer has positive charged traps and wherein said donor electrons neutralize said traps.
Claim 23
Dependent Claim
17 words
The HEMT of claim 20 , wherein donor electrons have a higher energy state than said traps.
Claim 24
Dependent Claim
15 words
The HEMT of claim 19 , wherein said electron source layer is a dielectric layer.
Claim 25
Dependent Claim
30 words
The HEMT of claim 19 , wherein said electron source layer has a stable bond with said barrier layer under stresses created by increases in electron field, voltage or temperature.
Claim 26
Dependent Claim
18 words
The HEMT of claim 19 , wherein the surface of said barrier layer is substantially free of damage.
Claim 27
Dependent Claim
14 words
The HEMT of claim 19 , wherein said electron source layer comprises silicon nitride.
Claim 28
Dependent Claim
27 words
The HEMT of claim 19 , further comprising a substrate of sapphire or silicon carbide, said substrate adjacent to said high resistivity layer, opposite said barrier layer.
Claim 29
Dependent Claim
19 words
The HEMT of claim 25 , further comprising a buffer layer between said high resistivity layer and said substrate.
Claim 30
Dependent Claim
23 words
The HEMT of claim 19 , wherein said high resistivity layer and said barrier layer are made of Group III nitride semiconductor materials.
Claim 31
Dependent Claim
20 words
The HEMT of claim 19 , wherein said source and drain contacts comprise an alloy of titanium, aluminum, and nickel.
Claim 32
Dependent Claim
27 words
The HEMT of claim 19 , wherein said gate is selected from a group consisting of titanium, platinum, chromium, alloys of titanium and tungsten, and platinum silicide.
Claim 33
Independent Claim
76 words
A method for manufacturing a transistor with an electron source layer on its surface, comprising: placing said transistor in a sputtering chamber,; sputtering said electron source layer on said transistor in said sputtering chamber, said electron source layer providing a source of electrons to eliminate trapping and allow said transistor to provide efficient gain with AC signals applied to said gate contact; cooling and venting said sputtering chamber; and removing said transistor from said sputtering chamber.
Claim 34
Independent Claim
76 words
A method for manufacturing a transistor with an electron source layer on its surface, comprising: placing said transistor in a sputtering chamber,; sputtering said electron source layer on said transistor in said sputtering chamber, said electron source layer providing a source of electrons to eliminate trapping and allow said transistor to provide efficient gain with AC signals applied to said gate contact; cooling and venting said sputtering chamber; and removing said transistor from said sputtering chamber.
Claim 35
Dependent Claim
22 words
The method of claim 31 , wherein said electron source layer is a dielectric layer with a high percentage of donor electrons.
Claim 36
Dependent Claim
24 words
The method of claim 31 , further comprising forming said transistor and cleaning said transistor prior to placing said transistor in said sputtering chamber.
Claim 37
Dependent Claim
17 words
The method of claim 33 , wherein said transistor is grown by metal-organic chemical vapor deposition (MOCVD).
Claim 38
Independent Claim
86 words
A method for manufacturing a transistor with an electron source layer on its surface, comprising: forming said transistor and cleaning said transistor prior to placing said transistor in said sputtering chamber, wherein said transistor is cleaned by rinsing said transistor with NH 4 OH:H 2 O (1:4) for approximately 10 to 60 seconds placing said transistor in a sputtering chamber; sputtering said electron source layer on said transistor in said sputtering chamber; cooling and venting said sputtering chamber; and removing said transistor from said sputtering chamber.
Claim 39
Independent Claim
86 words
A method for manufacturing a transistor with an electron source layer on its surface, comprising: forming said transistor and cleaning said transistor prior to placing said transistor in said sputtering chamber, wherein said transistor is cleaned by rinsing said transistor with NH 4 OH:H 2 O (1:4) for approximately 10 to 60 seconds placing said transistor in a sputtering chamber; sputtering said electron source layer on said transistor in said sputtering chamber; cooling and venting said sputtering chamber; and removing said transistor from said sputtering chamber.
Claim 40
Dependent Claim
28 words
The method of claim 31 , further comprising opening windows in said electron source layer for contacts on said transistor after said transistor is removed from said chamber.
Claim 41
Dependent Claim
18 words
The method of claim 36 , wherein said windows are opened in said electron source layer by etching.
Claim 42
Dependent Claim
15 words
The method of claim 31 , wherein said transistor is a FET or a HEMT.
Claim 43
Dependent Claim
70 words
The method of claim 31 , wherein said electron source layer is silicon nitride and said layer is deposited on said transistor by pumping down the said chamber to a predetermined pressure, bombarding a silicon source with a source gas to clean its surface, changing the chamber conditions to sputter the silicon, and allowing the sputtered silicon to react with nitrogen to deposit a silicon nitride layer on said transistor.
Claim 44
Dependent Claim
24 words
The method of claim 31 , wherein the forming of said electron source layer causes substantially no damage to the surface of said transistor.
Claim 45
Dependent Claim
17 words
The method of claim 31 , wherein said transistor is formed in a substantially hydrogen free environment.
References Cited (Backward Citations)
US4477311A
Cited
US5933705A
Cited
US5929467A
Cited
US6140169A
Cited
US6072203A
Cited
US6064082A
Cited
US6316820B1
Cited
US6261859B1
Cited
US6177685B1
Cited
US6316793B1
Cited
US6426264B1
Cited
WO2001013436A1
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2006-06-30 | 2006-12-30 | 2007-07-01 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2010-06-30 | 2010-12-30 | 2011-07-01 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2014-06-30 | 2014-12-30 | 2015-07-01 | $7700.00 | Window Closed / Lapsed |