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US5933705A Expired / Lapsed US ⏱️ 0.0 years remaining

Passivation and protection of semiconductor surface

Assignee: Lumentum Operations LLC
•
Filing: 1997-09-12
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Granted: 1999-08-03
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Expires: 2017-09-12
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Abstract

Abstract A surface of a compound III-V semiconductor device is passivated and protected, respectively, by treatment with a sulfur-containing or selenium-containing passivation film on the surface followed by the deposit of a GaN, GaP, InGaP, GaAsP, ZnS or ZnSe protection layer. Prior to passivation and deposition of the protective layer, previously formed contact metalizations may be protected with a liftoff film or layer. A low temperature MOCVD process is used to deposit the protection layer so that the integrity of the previously deposited contact metalization is maintained. The preferred range for MOCVD deposition of the protection layer is in the range of about 300 DEG C. to about 450 DEG C. This processing temperature range is within a temperature range where stable contact metalization exists.

Inventors

  • 👤 Randall S. Geels
  • 👤 Julian S. Osinski
  • 👤 David F. Welch
  • 👤 Donald R. Scifres

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-26 20:27
CPC Classifications
H; H10; H10H; H10H20/00; H10H20/80; H10H20/84; H01; H01S; H01S5/00; H01S5/02; H01S5/028; H01S5/0281; H01S5/0282

Claims Analysis

Total Claims: 29
Claim 1
Independent Claim 115 words
A process for passivating and protecting a first surface of a compound semiconductor device during manufacture and having at least one metal contact layer on a second surface, comprising the steps of: depositing a sacrificial layer on the second surface; depositing a protective layer on the first surface of the device so that the metal contact layer on the second surface is protected by the cover of the sacrificial layer from being contaminated by the deposition of the protective layer; and carrying out the deposition of the protective layer employing a low temperature deposition process at a deposition temperature below a temperature that will cause degradation of the metal contact layer on the second surface.
Claim 2
Dependent Claim 115 words
A process for passivating and protecting a first surface of a compound semiconductor device during manufacture and having at least one metal contact layer on a second surface, comprising the steps of: depositing a sacrificial layer on the second surface; depositing a protective layer on the first surface of the device so that the metal contact layer on the second surface is protected by the cover of the sacrificial layer from being contaminated by the deposition of the protective layer; and carrying out the deposition of the protective layer employing a low temperature deposition process at a deposition temperature below a temperature that will cause degradation of the metal contact layer on the second surface.
Claim 3
Dependent Claim 20 words
The process of claim 1 wherein the device comprises a III-V compound semiconductor and protective layer is III-V deposited material.
Claim 4
Dependent Claim 13 words
The process of claim 2 wherein the protective layer is deposited using MOCVD.
Claim 5
Dependent Claim 13 words
The process of claim 2 wherein said protective layer comprises GaP or InGaP.
Claim 6
Dependent Claim 14 words
The process of claim 4 wherein the deposition temperature is below about 450° C.
Claim 7
Dependent Claim 19 words
The process of claim 1 further comprising the step of passivating the device surface before depositing the protective layer.
Claim 8
Dependent Claim 19 words
The process of claim 6 wherein the passivation comprises the step of treating the device surface with sulfur-containing material.
Claim 9
Dependent Claim 25 words
The process of claim 6 further comprising the step of forming a sacrificial layer on the metal contact layer prior to the step of passivation.
Claim 10
Dependent Claim 13 words
The process of claim 8 wherein said sacrificial layer comprises SiO 2 .
Claim 11
Dependent Claim 134 words
A process for passivating at least one facet of a III-V optical semiconductor device having opposite major surfaces and at least one facet on an end surface of the device, comprising the steps of: forming a metal contact on at least one of the device major surfaces; depositing a sacrificial layer on the metal contact; treating the facet with a solution that chemically displaces facet surface oxides; and depositing a III-V compound protective layer on the facet in that the metal contact is protected from contamination during the protective layer deposition by the presence of the sacrificial layer; and carrying out the deposition of the III-V compound protective layer employing a low temperature deposition process operated at a deposition temperature below a temperature that will cause degradation of the previously formed metal contact layer.
Claim 12
Dependent Claim 134 words
A process for passivating at least one facet of a III-V optical semiconductor device having opposite major surfaces and at least one facet on an end surface of the device, comprising the steps of: forming a metal contact on at least one of the device major surfaces; depositing a sacrificial layer on the metal contact; treating the facet with a solution that chemically displaces facet surface oxides; and depositing a III-V compound protective layer on the facet in that the metal contact is protected from contamination during the protective layer deposition by the presence of the sacrificial layer; and carrying out the deposition of the III-V compound protective layer employing a low temperature deposition process operated at a deposition temperature below a temperature that will cause degradation of the previously formed metal contact layer.
Claim 13
Dependent Claim 18 words
The process of claim 10 wherein the facet is treated with a sulfur-containing material or a selenium-containing material.
Claim 14
Dependent Claim 19 words
The process of claim 11 wherein the facet is submerged in a solution comprising (NH 4 ) 2 S.
Claim 15
Dependent Claim 16 words
The process of claim 10 wherein said III-V deposited layer is GaN, GaP, InGaP or GaAsP.
Claim 16
Dependent Claim 14 words
The process of claim 13 wherein said III-V deposited layer is deposited employing MOCVD.
Claim 17
Dependent Claim 14 words
The process of claim 10 wherein said low temperature is below about 450° C.
Claim 18
Dependent Claim 29 words
The process of claim 14 wherein the III-V compound protective layer is deposited at a temperature below 450° C. to prevent degradation of the previously deposited metal contact layer.
Claim 19
Dependent Claim 19 words
The process of claim 14 wherein said III-V compound protective layer has a thickness of about several thousand angstroms.
Claim 20
Dependent Claim 17 words
The process of claim 17 wherein the thickness of said III-V compound layer is several hundred angstroms.
Claim 21
Dependent Claim 125 words
A process for passivating at least one facet on an optical semiconductor device formed from a III-V semiconductor wafer comprising the steps of: forming a sacrificial layer on major surfaces of the III-V semiconductor wafer to protect an underlying layer on those surfaces; dicing the III-V semiconductor wafer into individual optical semiconductor devices; treating the facet with a solution for chemically displacing facet native surface oxides; depositing a protective film on the facet at a temperature below which damage will not occur to the underlying layer; carrying out the deposition of the protective layer employing a low temperature deposition process at a deposition temperature below a temperature that will cause degradation of the underlying layer; and removing the sacrificial layer to expose the underlying layer.
Claim 22
Dependent Claim 125 words
A process for passivating at least one facet on an optical semiconductor device formed from a III-V semiconductor wafer comprising the steps of: forming a sacrificial layer on major surfaces of the III-V semiconductor wafer to protect an underlying layer on those surfaces; dicing the III-V semiconductor wafer into individual optical semiconductor devices; treating the facet with a solution for chemically displacing facet native surface oxides; depositing a protective film on the facet at a temperature below which damage will not occur to the underlying layer; carrying out the deposition of the protective layer employing a low temperature deposition process at a deposition temperature below a temperature that will cause degradation of the underlying layer; and removing the sacrificial layer to expose the underlying layer.
Claim 23
Dependent Claim 35 words
The process of claim 19 wherein said sacrificial layer is selected so as to be selectively removable from the underlying layer without damage and said device facet is not damaged by its application or removal.
Claim 24
Dependent Claim 36 words
The process of claim 20 wherein said sacrificial layer is selected from the group consisting of Si 3 N 4 , MgF 2 , Al 2 O 3 , SiO 2 , Al, Ti or Ni.
Claim 25
Dependent Claim 23 words
The process of claim 19 wherein said protection film is selected from the group consisting of GaN, GaP, InGaP, GaAsP, ZnS or ZnSe.
Claim 26
Dependent Claim 12 words
The process of claim 19 wherein said solution comprises a sulfur-containing solution.
Claim 27
Dependent Claim 25 words
The process of claim 23 wherein said sulfur-containing solution comprises solutions of (NH 4 ) 2 S or (NH 4 ) 2 S x .
Claim 28
Dependent Claim 12 words
The process of claim 19 wherein said solution comprises a selenium-containing solution.
Claim 29
Dependent Claim 13 words
The process of claim 19 wherein the underlying layer is a contact metalization.

References Cited (Backward Citations)

US4985370A Cited
US4811077A Cited
US5208468A Cited
US5260231A Cited
US5177031A Cited
US5228047A Cited
US5284792A Cited
US5491711A Cited
US5665637A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 2002-08-02 2003-02-01 2003-08-03 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2006-08-02 2007-02-01 2007-08-03 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2010-08-02 2011-02-01 2011-08-03 $7700.00 Window Closed / Lapsed

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