US6567967B2 — Method for designing large standard-cell base int…

Claim 1

Independent Claim 133 words

A method for physically designing an integrated circuit comprising: importing a netlist description of an integrated circuit design, said netlist description comprising a plurality of hierarchical arranged branches; selecting atomic blocks for each of said plurality of hierarchically arranged branches, each of said atomic blocks selected to be one or more hierarchy levels above the bottom of a corresponding one of said hierarchically arranged branches, each of said atomic blocks being either an atomic hard block, an atomic soft block or an atomic hierarchical block; flattening each of said plurality of hierarchically arranged branches by eliminating superfluous levels of hierarchy above said atomic blocks; partitioning each of said atomic blocks into one of a plurality of place and route units (“PRUs”); and positioning said atomic blocks within each of said plurality of PRUs.

Claim 2

Independent Claim 133 words

A method for physically designing an integrated circuit comprising: importing a netlist description of an integrated circuit design, said netlist description comprising a plurality of hierarchical arranged branches; selecting atomic blocks for each of said plurality of hierarchically arranged branches, each of said atomic blocks selected to be one or more hierarchy levels above the bottom of a corresponding one of said hierarchically arranged branches, each of said atomic blocks being either an atomic hard block, an atomic soft block or an atomic hierarchical block; flattening each of said plurality of hierarchically arranged branches by eliminating superfluous levels of hierarchy above said atomic blocks; partitioning each of said atomic blocks into one of a plurality of place and route units (“PRUs”); and positioning said atomic blocks within each of said plurality of PRUs.

Claim 3

Dependent Claim 45 words

The method of claim 1 wherein said partitioning step includes: determining a physically realizable shape for each of said plurality of PRUs; determining a physically realizable size for each of said plurality of PRUs; and determining PRU location for each of said plurality of PRUs.

Claim 4

Dependent Claim 135 words

The method of claim 2 wherein said determining PRU shape step includes: finding all of said atomic hard blocks and other hard blocks within each of said plurality of PRUs; calculating an initial PRU shape for each of said plurality of PRUs; determining whether said atomic hard blocks, said other hard blocks, and all standard cells assigned to said initial PRU shape will fit within said initial PRU shape; and if said atomic hard blocks, said other hard blocks, and all of said standard cells assigned to said initial PRU shape do not fit within said initial PRU shape, calculating an alternate initial PRU shape and determining whether said atomic hard blocks, said other hard blocks, and all of said standard cells assigned to said initial PRU shape will fit within said initial PRU shape.

Claim 5

Dependent Claim 112 words

The method of claim 1 wherein said positioning step further includes: moving all of said atomic hard blocks within a particular one of said plurality of PRUs such that each of said atomic hard blocks is one level of hierarchy below said particular one of said PRU; determining optimal placement of each of said atomic blocks; and selecting a rectilinear shape for each of said soft atomic blocks and said atomic hierarchical blocks within said particular one of said plurality of PRUs so that said soft atomic blocks and said atomic hierarchical blocks fit within areas of said particular one of said plurality of PRUs left unoccupied by said atomic hard blocks.

Claim 6

Dependent Claim 75 words

The method of claim 1 further including: routing interconnections between said plurality of PRUs; where one of said interconnections crosses an edge of one of said PRUs, assigning a port at said edge of one of said plurality of PRUs, said port comprising an electrical contact at said edge of one of said PRUs; pushing said interconnections inside said plurality of PRUs; and creating a physical circuit layout for each of said plurality of PRUs.

Claim 7

Dependent Claim 47 words

The method of claim 5 , wherein said pushing step results in at least one wrapper block containing said one of said PRUs and said one of said interconnections, wherein said one of said interconnections does not crossover said one of said PRUs in said wrapper block.

Claim 8

Dependent Claim 18 words

The method of claim 1 , wherein said partitioning step does not divide any of said atomic blocks.

Claim 9

Dependent Claim 18 words

The method of claim 1 , further including: designating at least one of said atomic blocks as stopped.

Claim 10

Dependent Claim 19 words

The method of claim 8 , wherein said at least one of said atomic blocks contains no hard blocks.

Claim 11

Dependent Claim 17 words

The method of claim 1 , further including: creating at least one dummy block from said netlist.

Claim 12

Dependent Claim 19 words

The method of claim 10 , wherein said at least one dummy block is a grouping of standard cells.

Claim 13

Dependent Claim 26 words

The method of claim 1 , wherein said superfluous levels of hierarchy include all levels of hierarchy between said atomic blocks and a top level block.

Claim 14

Dependent Claim 53 words

The method of claim 1 , wherein said partitioning step includes: generating an initial shape for a PRU in said plurality of PRUs, wherein said initial shape is sufficient for containing all hard blocks in said PRU; and determining whether said initial shape is sufficient for containing all standard cells in said PRU.

Claim 15

Dependent Claim 49 words

The method of claim 13 , wherein said partitioning step further includes: augmenting said initial shape to obtain an augmented shape for said PRU, wherein said augmented shape is sufficient for containing all of said hard blocks in said PRU and all of said soft blocks in said PRU.

Claim 16

Dependent Claim 27 words

The method of claim 14 , wherein said generating step, said determining step, and said augmenting step are performed for each PRU in said plurality of PRUs.

Claim 17

Dependent Claim 30 words

The method of claim 1 , wherein said partitioning step results in each PRU in said plurality of PRUs abutting at least one other PRU in said plurality of PRUs.

Claim 18

Dependent Claim 25 words

The method of claim 1 , wherein said partitioning step results in PRUs in said plurality of PRUs being aligned in equal height vertical rows.

Claim 19

Dependent Claim 25 words

The method of claim 1 , wherein said partitioning step results in PRUs in said plurality of PRUs being aligned in equal height horizontal rows.

Claim 20

Dependent Claim 61 words

The method of claim 1 , wherein said positioning step includes: moving all of said atomic hard blocks within a PRU in said plurality of PRUs to be one level of hierarchy below said PRU; placing said all of said atomic hard blocks in said PRU; and selecting a rectilinear shape for at least one atomic soft block in said PRU.

Claim 21

Dependent Claim 60 words

The method of claim 19 , further including: selecting a rectilinear shape in said PRU for each atomic soft block in said PRU and each atomic hierarchical block in said PRU so that said each atomic soft block and said each atomic hierarchical block fits within areas of said PRU left unoccupied by said all of said atomic hard blocks.

Claim 22

Dependent Claim 29 words

The method of claim 1 , wherein said positioning step results in at least one atomic block in a PRU in said plurality of PRUs having a rectilinear shape.

Claim 23

Dependent Claim 18 words

The method of claim 21 , wherein said at least one atomic block is an atomic soft block.

Claim 24

Dependent Claim 44 words

The method of claim 1 , further including: creating dummy ports on multiple PRUs in said plurality of said PRUs, said dummy ports enabling a net to traverse from a first PRU of said multiple PRUs to a second PRU of said multiple PRUs.

Claim 25

Dependent Claim 38 words

The method of claim 23 , wherein a first dummy port is created on an atomic soft block in said first PRU and a second dummy port is created on an atomic hard block in s second PRU.

Claim 26

Dependent Claim 46 words

The method of claim 24 , wherein said first dummy port is located at a random location on said atomic soft block in said first PRU and said second dummy port is located at an exact location on said atomic hard block in said second PRU.

Claim 27

Dependent Claim 48 words

The method of claim 23 , further including: connecting said dummy ports by routing nets between said dummy ports; determining where said routing nets cross edges of said multiple PRUs; deleting said dummy ports; and generating real ports where said routing nets cross edges of said multiple PRUs.

Claim 28

Dependent Claim 18 words

The method of claim 1 , further including: allocating slack time to PRUs in said plurality of PRUs.

Claim 29

Dependent Claim 27 words

The method of claim 27 , wherein said slack time is allocated to at least one PRU in said set of PRUs primarily to block input pins.

Claim 30

Dependent Claim 27 words

The method of claim 27 , wherein said slack time is allocated to at least one PRU in said set of PRUs primarily to block output pins.

Claim 31

Dependent Claim 41 words

The method of claim 27 , wherein said slack time is allocated to at least one PRU in said set of PRUs proportionately between block input pins and block output pins, based on expected delay within said at least one PRU.

Claim 32

Independent Claim 94 words

A method of routing an integrated circuit design comprised of a plurality of place and route units (“PRUs”), comprising: creating dummy ports on each of said PRUs, said dummy ports allowing a net to traverse from a first of said plurality of PRUs to a second of said plurality of PRUs; connecting said dummy ports on said PRUs by routing nets between them; determining where said routing nets cross edges of said plurality of PRUs; deleting said dummy ports; and generating real ports where said routing nets cross edges of said plurality of PRUs.

Claim 33

Independent Claim 94 words

A method of routing an integrated circuit design comprised of a plurality of place and route units (“PRUs”), comprising: creating dummy ports on each of said PRUs, said dummy ports allowing a net to traverse from a first of said plurality of PRUs to a second of said plurality of PRUs; connecting said dummy ports on said PRUs by routing nets between them; determining where said routing nets cross edges of said plurality of PRUs; deleting said dummy ports; and generating real ports where said routing nets cross edges of said plurality of PRUs.

Claim 34

Independent Claim 94 words

A method of fitting an integrated circuit design within a predefined area, the integrated circuit design comprising one or more of hard blocks, hierarchical blocks and soft blocks, the hard blocks having a fixed shape, comprising: determining optimal placement of each of the hard blocks, if any, within the predefined area; and selecting a rectilinear shape for each of the soft blocks, if any, and hierarchical blocks, if any, so that the soft blocks, if any, and hierarchical blocks, if any, fit within spaces of the predefined area left unoccupied by the hard blocks.

Claim 35

Independent Claim 94 words

A method of fitting an integrated circuit design within a predefined area, the integrated circuit design comprising one or more of hard blocks, hierarchical blocks and soft blocks, the hard blocks having a fixed shape, comprising: determining optimal placement of each of the hard blocks, if any, within the predefined area; and selecting a rectilinear shape for each of the soft blocks, if any, and hierarchical blocks, if any, so that the soft blocks, if any, and hierarchical blocks, if any, fit within spaces of the predefined area left unoccupied by the hard blocks.

Claim 36

Independent Claim 75 words

A method of fitting an integrated circuit design within a predefined area, said method comprising: determining placement of at least one hard block within the predefined area, wherein said at least one hard block has a predefined shape; and selecting a rectilinear shape for at least one block within the predefined area, such that said at least one block fits within space in said predefined area left unoccupied by said at least one hard block.

Claim 37

Independent Claim 75 words

A method of fitting an integrated circuit design within a predefined area, said method comprising: determining placement of at least one hard block within the predefined area, wherein said at least one hard block has a predefined shape; and selecting a rectilinear shape for at least one block within the predefined area, such that said at least one block fits within space in said predefined area left unoccupied by said at least one hard block.

Claim 38

Dependent Claim 15 words

The method of claim 33 , wherein said at least one block includes multiple blocks.

Claim 39

Dependent Claim 16 words

The method of claim 34 , wherein said at least one block includes a soft block.

Claim 40

Dependent Claim 17 words

The method of claim 34 , wherein said at least one hard block includes multiple hard blocks.

Annuity Stage	Window Opens	Payment Deadline	Surcharge Period Until	Estimated Fee	Status
3.5 Years (Year 4)	2006-05-19	2006-11-18	2007-05-20	$2000.00	Window Closed / Lapsed
7.5 Years (Year 8)	2010-05-19	2010-11-18	2011-05-20	$3760.00	Window Closed / Lapsed
11.5 Years (Year 12)	2014-05-19	2014-11-18	2015-05-20	$7700.00	Window Closed / Lapsed

Method for designing large standard-cell base integrated circuits

Abstract

Inventors

Bibliographic Details

Claims Analysis

References Cited (Backward Citations)

USPTO Annuity & Maintenance Windows

Assigned Categories & Tags

Assign Category Tag