US6538475B1
Expired / Lapsed
US
⏱️ 0.0 years remaining
Phase detector
Assignee: Intel Corp
•
Filing: 2000-03-15
•
Granted: 2003-03-25
•
Expires: 2020-03-15
Abstract
Abstract A phase detector and corresponding method. The phase detector detects a transition of a first signal and generates an output signal having a first value if a transition of a second signal occurs before the transition of the first signal and having a second value if the transition of the second signal occurs after the transition of the first signal. The output signal is maintained at the generated value until another transition of the first signal is detected. A strobe signal may be used to strobe the output signal.
Inventors
- 👤 Henrik Ingvart Johansen
- 👤 Henning Lysdal
- 👤 Benny Christensen
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-28 12:45
CPC Classifications
H; H03; H03L; H03L7/00; H03L7/06; H03L7/08; H03L7/085; H03L7/089; H03D; H03D13/00; H03D13/003; H03D13/004; H04; H04L; H04L7/00; H04L7/02; H04L7/033
Claims Analysis
Total Claims: 13
Claim 1
Independent Claim
83 words
A method comprising: detecting a transition of a first signal; generating a logic output signal of a first logic value if a transition of a second signal occurs before the transition of the first signal and of a second logic value if the transition of the second signal occurs after the transition of the first signal; maintaining the logic output signal at the generated value until detecting another transition of the first signal; and strobing the logic output signal with a strobe signal.
Claim 2
Independent Claim
83 words
A method comprising: detecting a transition of a first signal; generating a logic output signal of a first logic value if a transition of a second signal occurs before the transition of the first signal and of a second logic value if the transition of the second signal occurs after the transition of the first signal; maintaining the logic output signal at the generated value until detecting another transition of the first signal; and strobing the logic output signal with a strobe signal.
Claim 3
Dependent Claim
17 words
The method according to claim 1 , further comprising generating the strobe signal from the second signal.
Claim 4
Dependent Claim
17 words
The method according to claim 1 , further comprising sampling the first signal with the second signal.
Claim 5
Dependent Claim
110 words
A phase detector comprising: a first logic circuit to detect a transition of a first signal; a second logic circuit coupled to the first logic circuit to generate a logic output signal of a first logic value upon detecting a transition of the first signal if a transition of the second signal occurs before the transition of the first signal and of a second logic value if the transition of the second signal occurs after the transition of the first signal, and a third logic circuit coupled to the second logic circuit to maintain the logic output signal at the generated value until detecting another transition of the first signal.
Claim 6
Dependent Claim
110 words
A phase detector comprising: a first logic circuit to detect a transition of a first signal; a second logic circuit coupled to the first logic circuit to generate a logic output signal of a first logic value upon detecting a transition of the first signal if a transition of the second signal occurs before the transition of the first signal and of a second logic value if the transition of the second signal occurs after the transition of the first signal, and a third logic circuit coupled to the second logic circuit to maintain the logic output signal at the generated value until detecting another transition of the first signal.
Claim 7
Dependent Claim
18 words
The phase detector according to claim 4 further comprising a strobe signal to strobe the logic output signal.
Claim 8
Dependent Claim
22 words
The phase detector according to claim 5 , wherein the second signal generates the strobe signal to strobe the logic output signal.
Claim 9
Dependent Claim
21 words
The phase detector according to claim 4 , wherein the second signal is a clock signal to sample the first signal.
Claim 10
Dependent Claim
73 words
A circuit comprising: a controlled oscillator to generate a clock signal; a sampling circuit coupled to the clock signal of the controlled oscillator to sample a signal with the clock signal; and a phase locked loop including the controlled oscillator to phase lock the clock signal to the signal, and a phase detector wherein a strobed output of the phase detector adjusts the controlled oscillator to alter the frequency of the clock signal.
Claim 11
Dependent Claim
73 words
A circuit comprising: a controlled oscillator to generate a clock signal; a sampling circuit coupled to the clock signal of the controlled oscillator to sample a signal with the clock signal; and a phase locked loop including the controlled oscillator to phase lock the clock signal to the signal, and a phase detector wherein a strobed output of the phase detector adjusts the controlled oscillator to alter the frequency of the clock signal.
Claim 12
Dependent Claim
113 words
The circuit of claim 8 wherein the phase detector further comprises: a first logic circuit to detect a transition of the signal, and a second logic circuit coupled to the first logic circuit to generate a logic output signal of a first logic value upon detecting a transition of the signal if a transition of the clock signal occurs before the transition of the signal and of a second logic value if the transition of the clock signal occurs after the transition of the signal, and a third logic circuit coupled to the second logic circuit to maintain the logic output signal at the generated value until detecting another transition of the signal.
Claim 13
Dependent Claim
21 words
The circuit according to claim 9 , wherein the clock signal generates a strobe signal to strobe the logic output signal.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2006-03-24 | 2006-09-23 | 2007-03-25 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2010-03-24 | 2010-09-23 | 2011-03-25 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2014-03-24 | 2014-09-23 | 2015-03-25 | $7700.00 | Window Closed / Lapsed |