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US6515609B1 Expired / Lapsed US ⏱️ 0.0 years remaining

Radio receiver

Assignee: NXP BV
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Filing: 2000-03-09
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Granted: 2003-02-04
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Expires: 2020-03-09
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Abstract

Abstract A radio receiver comprises frequency translation means( 20, 21, 22 ) for frequency down converting an input signal to an intermediate signal, digital channel selection filtering means including at least one analogue-to-digital converter(ADC)( 32, 33 ), the ADC comprising an over-sampling quantizer(Q 1, Q 2 ) having a plurality of dynamically selectable quantization levels, and means( 30, 31, 36 ) responsive to the characteristics of the input signal for adjusting the resolution of the ADC to the characteristics of the input signal. The ADC may comprise a Sigma-Delta ADC. The resolution may be adjusted by altering the over-sampling rate and/or selecting the number of quantization levels to handle the prevailing interference and the wanted signal.

Inventors

  • 👤 Timothy J. Moulsley

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-31 05:37
CPC Classifications
H; H04; H04B; H04B1/00; H04B1/06; H04B1/16; H04W; H04W52/00; H04W52/02; H04W52/0209; H04W52/0225; H04W52/0238; H04B1/26; H04B1/28; Y; Y02; Y02D; Y02D30/00; Y02D30/70

Claims Analysis

Total Claims: 15
Claim 1
Independent Claim 48 words
A receiver comprising at least one analogue-to-digital converter (ADC), means for determining a level of at least one prevailing adjacent channel interference, and means for dynamically adjusting the resolution of the ADC to be no larger than that required to handle the prevailing interference and a desired signal.
Claim 2
Dependent Claim 48 words
A receiver comprising at least one analogue-to-digital converter (ADC), means for determining a level of at least one prevailing adjacent channel interference, and means for dynamically adjusting the resolution of the ADC to be no larger than that required to handle the prevailing interference and a desired signal.
Claim 3
Dependent Claim 68 words
A receiver comprising means to frequency down convert an input signal to an intermediate signal, digital channel selection filtering means including at least one analogue-to-digital converter (ADC), said ADC comprising an over-sampling quantizer having a plurality of dynamically selectable quantization levels, and means responsive to the characteristics of the input signal for at least matching the number of quantization levels selected to the characteristics of the input signal.
Claim 4
Dependent Claim 68 words
A receiver comprising means to frequency down convert an input signal to an intermediate signal, digital channel selection filtering means including at least one analogue-to-digital converter (ADC), said ADC comprising an over-sampling quantizer having a plurality of dynamically selectable quantization levels, and means responsive to the characteristics of the input signal for at least matching the number of quantization levels selected to the characteristics of the input signal.
Claim 5
Dependent Claim 175 words
A receiver comprising means to frequency down convert an input signal to an intermediate signal, digital channel selection filtering means including at least one analogue-to-digital converter(ADC), said ADC comprising a signal combiner having first and second inputs and an output, the intermediate frequency signal being coupled to the first input, analogue filtering means coupled to said output, an over-sampling quantizer coupled to an output of the analogue filtering means, the over-sampling quantizer having an output which is coupled to digital filtering means which provides an output signal, a digital to analogue converter having an input coupled to the output of the over-sampling quantizer and an output coupled to the second input of the signal combiner which produces the difference between the signals on its first and second inputs as an output, wherein the over-sampling quantizer has a plurality of dynamically selectable quantization levels, and means responsive to the characteristics of the input signal are provided for varying the over-sampling rate and/or matching the number of quantization levels selected to the characteristics of the input signal.
Claim 6
Dependent Claim 175 words
A receiver comprising means to frequency down convert an input signal to an intermediate signal, digital channel selection filtering means including at least one analogue-to-digital converter(ADC), said ADC comprising a signal combiner having first and second inputs and an output, the intermediate frequency signal being coupled to the first input, analogue filtering means coupled to said output, an over-sampling quantizer coupled to an output of the analogue filtering means, the over-sampling quantizer having an output which is coupled to digital filtering means which provides an output signal, a digital to analogue converter having an input coupled to the output of the over-sampling quantizer and an output coupled to the second input of the signal combiner which produces the difference between the signals on its first and second inputs as an output, wherein the over-sampling quantizer has a plurality of dynamically selectable quantization levels, and means responsive to the characteristics of the input signal are provided for varying the over-sampling rate and/or matching the number of quantization levels selected to the characteristics of the input signal.
Claim 7
Dependent Claim 50 words
The receiver as claimed in claim 1 , including filters for measuring characteristics of the desired channel signal and at least the adjacent channel signals and means for selecting at least one of the over-sampling rate and number of quantization levels in response to the measurements made by the filters.
Claim 8
Dependent Claim 15 words
The receiver as claimed in claim 1 , wherein the ADC is a Sigma-Delta ADC.
Claim 9
Independent Claim 51 words
A method of operating a receiver having at least one analogue to digital converter (ADC), comprising determining a level of at least one prevailing adjacent channel interference and dynamically adjusting the resolution of the ADC to be no larger than that required to handle the prevailing interference and a wanted signal.
Claim 10
Independent Claim 51 words
A method of operating a receiver having at least one analogue to digital converter (ADC), comprising determining a level of at least one prevailing adjacent channel interference and dynamically adjusting the resolution of the ADC to be no larger than that required to handle the prevailing interference and a wanted signal.
Claim 11
Dependent Claim 42 words
The method as claimed in claim 6 , wherein the ADC includes a quantizer having a plurality of selectable quantization levels and the resolution is adjusted by varying the number of levels selected to match the dynamic range of the prevailing interference.
Claim 12
Dependent Claim 27 words
The method as claimed in claim 6 , wherein the ADC includes an over-sampling quantiser and the rate of sampling is varied to suit the required resolution.
Claim 13
Dependent Claim 54 words
An integrated circuit comprising at least one analogue-to-digital converter (ADC), said ADC comprising an over-sampling quantizer having a plurality of dynamically selectable quantization levels, and means responsive to the characteristics of an input signal to the ADC for at least matching the number of quantization levels selected to the characteristics of the input signal.
Claim 14
Dependent Claim 54 words
An integrated circuit comprising at least one analogue-to-digital converter (ADC), said ADC comprising an over-sampling quantizer having a plurality of dynamically selectable quantization levels, and means responsive to the characteristics of an input signal to the ADC for at least matching the number of quantization levels selected to the characteristics of the input signal.
Claim 15
Dependent Claim 16 words
The integrated circuit as claimed in claim 9 , wherein the ADC is a Sigma-Delta ADC.

References Cited (Backward Citations)

US4910752A Cited
US5550544A Cited
US5550544C1 Cited
US5625359A Cited
US6219559B1 Cited
US5886988A Cited
US6219108B1 Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 2006-02-03 2006-08-05 2007-02-04 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2010-02-03 2010-08-05 2011-02-04 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2014-02-03 2014-08-05 2015-02-04 $7700.00 Window Closed / Lapsed

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