Patent US6507213B1 successfully refreshed from Google Patents.
← Back to Patent Explorer
US6507213B1 Expired / Lapsed US ⏱️ 0.0 years remaining

Parallel configuration method and/or architecture for PLDs or FPGAs

Assignee: Monterey Research LLC
•
Filing: 2001-03-15
•
Granted: 2003-01-14
•
Expires: 2021-03-15
📄 Original PDF 🌐 Google Patents 🔄 Sync Now

Abstract

Abstract A programmable logic device comprising a plurality of configuration blocks that may be configured to store configuration information for configuring the programmable logic device. The configuration blocks may be simultaneously programmed.

Inventors

  • 👤 Harish Dangat

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-08 15:07
CPC Classifications
H; H03; H03K; H03K19/00; H03K19/02; H03K19/173; H03K19/177; H03K19/17748; H03K19/17758

Claims Analysis

Total Claims: 26
Claim 1
Independent Claim 57 words
A programmable logic device comprising: a plurality of configuration blocks, each comprising a plurality of memory elements configured to store configuration information for configuring said programmable logic device, wherein (i) two or more of said configuration blocks are simultaneously programmed and (ii) said plurality of configuration blocks are configured as two or more sets of configuration blocks.
Claim 2
Dependent Claim 57 words
A programmable logic device comprising: a plurality of configuration blocks, each comprising a plurality of memory elements configured to store configuration information for configuring said programmable logic device, wherein (i) two or more of said configuration blocks are simultaneously programmed and (ii) said plurality of configuration blocks are configured as two or more sets of configuration blocks.
Claim 3
Dependent Claim 36 words
The programmable logic device according to claim 1 , further comprising: a logic circuit configured to retrieve said configuration information from an external memory and simultaneously distribute said configuration information among said plurality of configuration blocks.
Claim 4
Dependent Claim 19 words
The programmable logic device according to claim 1 , wherein said configuration blocks of each set are configured serially.
Claim 5
Dependent Claim 19 words
The programmable logic device according to claim 1 , wherein each set comprises a similar number of configuration blocks.
Claim 6
Dependent Claim 23 words
The programmable logic device according to claim 1 , wherein two or more of said sets comprise a different number of configuration blocks.
Claim 7
Dependent Claim 46 words
The programmable logic device according to claim 2 , wherein said logic circuit comprises: a configuration logic circuit configured to (i) retrieve said configuration information, (ii) decompress and/or decode said configuration information, and (iii) generate one or more configuration signals in response to said configuration information.
Claim 8
Dependent Claim 30 words
The programmable logic device according to claim 6 , wherein said logic circuit further comprises a distribution circuit configured to distribute said configuration signals among said plurality of configuration blocks.
Claim 9
Dependent Claim 17 words
The programmable logic device according to claim 7 , wherein said distribution circuit comprises a shift register.
Claim 10
Dependent Claim 18 words
The programmable logic device according to claim 8 , wherein said shift register is a serial-in-parallel-out shift register.
Claim 11
Dependent Claim 33 words
The programmable logic device according to claim 8 , wherein said distribution circuit further comprises a control logic circuit configured to control said shift register in response to one or more control signals.
Claim 12
Dependent Claim 20 words
The programmable logic device according to claim 1 , wherein said programmable logic device comprises a complex programmable logic device.
Claim 13
Dependent Claim 20 words
The programmable logic device according to claim 1 , wherein said programmable logic device comprises a field programmable gate array.
Claim 14
Independent Claim 69 words
A method for reducing configuration time of a programmable logic device comprising the steps of: receiving configuration information; generating a plurality of configuration signals in response to said configuration information; and simultaneously programming a plurality of configuration blocks in response to said plurality of configuration signals, wherein each of said configuration blocks comprises a plurality of memory elements configured to store configuration information for configuring said programmable logic device.
Claim 15
Independent Claim 69 words
A method for reducing configuration time of a programmable logic device comprising the steps of: receiving configuration information; generating a plurality of configuration signals in response to said configuration information; and simultaneously programming a plurality of configuration blocks in response to said plurality of configuration signals, wherein each of said configuration blocks comprises a plurality of memory elements configured to store configuration information for configuring said programmable logic device.
Claim 16
Dependent Claim 19 words
The method according to claim 13 , wherein the receiving step comprises a sub-step of: decompressing said configuration information.
Claim 17
Dependent Claim 19 words
The method according to claim 13 , wherein the receiving step comprises a sub-stop of: decoding the configuration information.
Claim 18
Dependent Claim 29 words
The method according to claim 13 , wherein the programming step further comprises a sub-step of: presenting said plurality of configuration signals to said plurality of configuration blocks simultaneously.
Claim 19
Independent Claim 55 words
An apparatus comprising: means for retrieving configuration information; and means for simultaneously programming a plurality of configuration blocks, wherein said plurality of configuration blocks are configured as two or more sets and each of said configuration blocks comprises a plurality of memory elements configured to store said configuration information to configure a programmable logic device.
Claim 20
Independent Claim 55 words
An apparatus comprising: means for retrieving configuration information; and means for simultaneously programming a plurality of configuration blocks, wherein said plurality of configuration blocks are configured as two or more sets and each of said configuration blocks comprises a plurality of memory elements configured to store said configuration information to configure a programmable logic device.
Claim 21
Dependent Claim 22 words
The apparatus according to claim 17 , further comprising: means for implementing user defined programmable logic in response to said configuration information.
Claim 22
Independent Claim 42 words
A method for reducing configuration time of a programmable logic device comprising the steps of: receiving configuration information; decompressing said configuration information; and simultaneously programming a plurality of configuration memory elements configured to store configuration information for configuring said programmable logic device.
Claim 23
Independent Claim 42 words
A method for reducing configuration time of a programmable logic device comprising the steps of: receiving configuration information; decompressing said configuration information; and simultaneously programming a plurality of configuration memory elements configured to store configuration information for configuring said programmable logic device.
Claim 24
Independent Claim 42 words
A method for reducing configuration time of a programmable logic device comprising the steps of: receiving configuration information; decoding the configuration information; and simultaneously programming a plurality of configuration memory elements configured to store configuration information for configuring said programmable logic device.
Claim 25
Independent Claim 42 words
A method for reducing configuration time of a programmable logic device comprising the steps of: receiving configuration information; decoding the configuration information; and simultaneously programming a plurality of configuration memory elements configured to store configuration information for configuring said programmable logic device.
Claim 26
Dependent Claim 28 words
The programmable logic device according to claim 2 , wherein: said logic circuit is configured to generate a plurality of configuration signals in response to said configuration information.

References Cited (Backward Citations)

US4717914A Cited
US5996091A Cited
US6031391A Cited
US6091263A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 2006-01-13 2006-07-15 2007-01-14 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2010-01-13 2010-07-15 2011-01-14 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2014-01-13 2014-07-15 2015-01-14 $7700.00 Window Closed / Lapsed

Assigned Categories & Tags

No categories assigned to this patent yet.

Assign Category Tag