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US6483158B1 Expired / Lapsed US ⏱️ 0.0 years remaining

Semiconductor memory device and fabrication method therefor

Assignee: SK Hynix Inc
•
Filing: 2000-01-12
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Granted: 2002-11-19
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Expires: 2020-01-12
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Abstract

Abstract A semiconductor device and a fabrication method thereof which can, for example, prevent a punch-through from occurring by forming oxide spacers around source/drain regions in a semiconductor substrate instead of forming a conventional halo ion implanting layer. Such structure improves, for example, an operational speed by reducing junction capacitance, prevents a hot carrier effect from occurring by weakening an electric field around the drain region, and improves reliability by preventing a latch up from occurring. The semiconductor device includes a gate electrode formed on the semiconductor substrate, sidewall spacers formed at the sidewalls of the gate electrode, an impurity layer formed in the semiconductor substrate below each sidewall spacer, a trench formed in the semiconductor substrate at both sides of the gate electrode, oxide spacers formed at the bottom inside corner of each trench, and a conductive material filling up each trench.

Inventors

  • 👤 Sang-Ho Lee

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-29 07:50
CPC Classifications
H; H10; H10D; H10D62/00; H10D62/01; H10D62/021; H10P; H10P10/00; H10D62/10; H10D62/113; H10D62/115; H10D62/116; H10B; H10B12/00; H10B12/01; H10B12/02; H10B12/05; H10D64/00; H10D64/20; H10D64/23; H10D64/251; H10D64/256

Claims Analysis

Total Claims: 8
Claim 1
Independent Claim 162 words
A semiconductor device, comprising: a substrate with a top surface that extends in a first direction; a gate oxide film formed on the top surface of the substrate; a gate electrode formed on the gate oxide film; an insulating sidewall spacer formed at each sidewall of the gate electrode; a recess formed in the substrate on each side of the gate electrode; a lightly doped impurity layer formed in the substrate below each insulating sidewall spacer and adjacent to a top edge of each recess; an oxide spacer formed in each recess only at a bottom inside corner of each recess, wherein each oxide spacer does not extend to an upper surface of its respective recess and wherein each oxide spacer only partially overlaps the impurity layer located at the top edge of its respective recess along a second direction, which is perpendicular to the first direction; and a conductive material formed in each recess to form a source or a drain.
Claim 2
Dependent Claim 162 words
A semiconductor device, comprising: a substrate with a top surface that extends in a first direction; a gate oxide film formed on the top surface of the substrate; a gate electrode formed on the gate oxide film; an insulating sidewall spacer formed at each sidewall of the gate electrode; a recess formed in the substrate on each side of the gate electrode; a lightly doped impurity layer formed in the substrate below each insulating sidewall spacer and adjacent to a top edge of each recess; an oxide spacer formed in each recess only at a bottom inside corner of each recess, wherein each oxide spacer does not extend to an upper surface of its respective recess and wherein each oxide spacer only partially overlaps the impurity layer located at the top edge of its respective recess along a second direction, which is perpendicular to the first direction; and a conductive material formed in each recess to form a source or a drain.
Claim 3
Dependent Claim 21 words
The device according to claim 1 , wherein the conductive material is formed at an upper portion of each oxide spacer.
Claim 4
Dependent Claim 26 words
The device according to claim 1 , wherein the conductive material in each of the recesses is operated as source or drain of a transistor, respectively.
Claim 5
Dependent Claim 24 words
The device according to claim 1 , wherein the conductive material is at least one of a doped polysilicon and a doped monocrystalline silicon.
Claim 6
Dependent Claim 13 words
The device according to claim 1 , wherein the recess is a trench.
Claim 7
Dependent Claim 34 words
The device according to claim 1 , wherein the oxide spacer only partially overlaps the impurity layer such that a portion of the impurity layer along the second direction directly contacts the conductive material.
Claim 8
Dependent Claim 20 words
The device according to claim 1 , wherein the gate electrode partially overlaps the impurity layer along the first direction.

References Cited (Backward Citations)

JPH06151842A Cited
US5491099A Cited
US6037605A Cited
US6051472A Cited
US6004878A Cited
US5943575A Cited
US6071783A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 2005-11-18 2006-05-20 2006-11-19 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2009-11-18 2010-05-20 2010-11-19 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2013-11-18 2014-05-20 2014-11-19 $7700.00 Window Closed / Lapsed

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