US6465994B1
Expired / Lapsed
US
⏱️ 0.0 years remaining
Low dropout voltage regulator with variable bandwidth based on load current
Assignee: Texas Instruments Inc
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Filing: 2002-03-27
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Granted: 2002-10-15
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Expires: 2022-03-27
Abstract
Abstract A low dropout voltage regulator includes: a first amplifier A 1 having a reference voltage node VREF coupled to a first input; a second amplifier A 2 having an input coupled to an output of the first amplifier A 1 ; a variable bias current source I 1 coupled to the first amplifier A 1 and having a control node coupled to an output of the second amplifier A 2 ; a power switch M 1 having a control node coupled to the output of the second amplifier A 2 and having a first end coupled to a source voltage node VDD; and a feedback circuit R 1 and R 2 having an input coupled to a second end of the power switch M 1 and an output coupled to a second input of the first amplifier A 1 . The best node in the system that detects the load current level is the output of the second amplifier A 2 . This signal is used to modulate the bias current I 1 of the first amplifier A 1 by increasing the bias current when the load current increases and vice versa, which consequently modulates the transconductance of amplifier A 1 . This provides a higher bandwidth LDO with better transient performance and higher power supply rejection ratio.
Inventors
- 👤 Xiaoyu Xi
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-30 13:47
CPC Classifications
G; G05; G05F; G05F1/00; G05F1/10; G05F1/46; G05F1/56; G05F1/575
Claims Analysis
Total Claims: 22
Claim 1
Independent Claim
111 words
A low dropout voltage regulator circuit comprising: a first amplifier having a reference voltage node coupled to a first input; a second amplifier having an input coupled to an output of the first amplifier; a variable bias current source coupled to the first amplifier and having a control node coupled to an output of the second amplifier; a power switch having a control node coupled to the output of the second amplifier and having a first end coupled to a source voltage node; and a feedback circuit having an input coupled to a second end of the power switch and an output coupled to a second input of the first amplifier.
Claim 2
Dependent Claim
111 words
A low dropout voltage regulator circuit comprising: a first amplifier having a reference voltage node coupled to a first input; a second amplifier having an input coupled to an output of the first amplifier; a variable bias current source coupled to the first amplifier and having a control node coupled to an output of the second amplifier; a power switch having a control node coupled to the output of the second amplifier and having a first end coupled to a source voltage node; and a feedback circuit having an input coupled to a second end of the power switch and an output coupled to a second input of the first amplifier.
Claim 3
Dependent Claim
33 words
The circuit of claim 1 wherein a current in the variable bias current source increases when a current in the power switch increases, and decreases when the current in the power switch decreases.
Claim 4
Dependent Claim
27 words
The circuit of claim 1 further comprising a buffer coupled between the output of the second amplifier and the control node of the variable bias current source.
Claim 5
Dependent Claim
25 words
The circuit of claim 1 further comprising a buffer coupled between the output of the second amplifier and the control node of the power switch.
Claim 6
Dependent Claim
12 words
The circuit of claim 1 wherein the power switch is a transistor.
Claim 7
Dependent Claim
23 words
The circuit of claim 1 wherein the variable bias current source comprises a constant current source in parallel with an adjustable current source.
Claim 8
Dependent Claim
26 words
The circuit of claim 6 wherein the adjustable current source comprises a bias transistor having a control node coupled to the output of the second amplifier.
Claim 9
Dependent Claim
13 words
The circuit of claim 7 wherein the bias transistor is a MOS transistor.
Claim 10
Dependent Claim
25 words
The circuit of claim 7 further comprising a buffer coupled between the output of the second amplifier and the control node of the bias transistor.
Claim 11
Dependent Claim
58 words
The circuit of claim 9 wherein the buffer comprises: a first buffer transistor having a control node coupled to the output of the second amplifier; and a second buffer transistor having a first end and a control node coupled to the control node of the bias transistor, and having a second end coupled to the first buffer transistor.
Claim 12
Dependent Claim
59 words
A circuit comprising: a first amplifier; a second amplifier having an input coupled to an output of the first amplifier; a variable bias current source coupled to the first amplifier and having a control node coupled to an output of the second amplifier; and a power switch having a control node coupled to the output of the second amplifier.
Claim 13
Dependent Claim
59 words
A circuit comprising: a first amplifier; a second amplifier having an input coupled to an output of the first amplifier; a variable bias current source coupled to the first amplifier and having a control node coupled to an output of the second amplifier; and a power switch having a control node coupled to the output of the second amplifier.
Claim 14
Dependent Claim
33 words
The circuit of claim 11 wherein a current in the variable bias current source increases when a current in the power switch increases, and decreases when the current in the power switch decreases.
Claim 15
Dependent Claim
33 words
The circuit of claim 11 further comprising a feedback circuit having an input coupled to a second end of the power switch and an output coupled to an input of the first amplifier.
Claim 16
Dependent Claim
27 words
The circuit of claim 11 further comprising a buffer coupled between the output of the second amplifier and the control node of the variable bias current source.
Claim 17
Dependent Claim
25 words
The circuit of claim 11 further comprising a buffer coupled between the output of the second amplifier and the control node of the power switch.
Claim 18
Dependent Claim
12 words
The circuit of claim 11 wherein the power switch is a transistor.
Claim 19
Dependent Claim
23 words
The circuit of claim 11 wherein the variable bias current source comprises a constant current source in parallel with an adjustable current source.
Claim 20
Dependent Claim
26 words
The circuit of claim 17 wherein the adjustable current source comprises a bias transistor having a control node coupled to the output of the second amplifier.
Claim 21
Dependent Claim
25 words
The circuit of claim 18 further comprising a buffer coupled between the output of the second amplifier and the control node of the bias transistor.
Claim 22
Dependent Claim
58 words
The circuit of claim 19 wherein the buffer comprises: a first buffer transistor having a control node coupled to the output of the second amplifier; and a second buffer transistor having a first end and a control node coupled to the control node of the bias transistor, and having a second end coupled to the first buffer transistor.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2005-10-14 | 2006-04-15 | 2006-10-15 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2009-10-14 | 2010-04-15 | 2010-10-15 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2013-10-14 | 2014-04-15 | 2014-10-15 | $7700.00 | Window Closed / Lapsed |