US5889393A
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Voltage regulator having error and transconductance amplifiers to define multiple poles
Assignee: Semiconductor Components Industries LLC
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Filing: 1997-09-29
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Granted: 1999-03-30
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Expires: 2017-09-29
Abstract
Abstract A voltage regulator and method of voltage regulation utilizes an error amplifier and a transconductance amplifier together with a voltage reference, startup circuit and output load. The use of the transconductance amplifier allows the use of an arrangement of two poles and a zero such that the composite gain roll-off has a generally constant slope. One of the poles utilized in this stability scheme is the outer pole formed by the resistive-like load and its filter capacitor. Another pole and zero are generated in the error amplifier circuit. To decouple the noisy input supply voltage, sensitive parts of the circuit are powered by the regulated output voltage. A start circuit is provided to start up the output and voltage reference when no output voltage is present. The transconductance amplifier block has special characteristics which allow it to work to relatively high frequency, above the gain bandwidth product of the control loop. It is driven by a fully differential push-pull, class AB amplifier. The transconductance amplifier utilizes a current mirror approach to current sensing in the output device which utilizes cascode techniques for more accurate current sensing in the current mirror.
Inventors
- 👤 Robert S. Wrathall
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-30 17:53
CPC Classifications
G; G05; G05F; G05F1/00; G05F1/10; G05F1/46; G05F1/56; G05F1/565
Claims Analysis
Total Claims: 27
Claim 1
Independent Claim
198 words
A voltage regulator comprising: a first gain stage having an error amplifier, said error amplifier having an error output voltage that is responsive to a difference between a reference input voltage and a feedback input voltage; a second gain stage which is a transconductance amplifier being connected to receive said error output voltage, said transconductance amplifier including: (a) a current mirror connected to provide at least a portion of a first conductive path from an input terminal to a low voltage terminal and a second conductive path from said input terminal to an output terminal; and (b) current-controlling means for regulating an output current through said second conductive path, said current-controlling means configured to compare said error output voltage with a first voltage at a node on said first conductive path to provide said regulation; an output load connected to said transconductance amplifier to receive said output current to convert said output current into a regulated output voltage; a feedback path connected to provide said feedback input voltage to said error amplifier, said feedback input voltage being responsive to said regulated output voltage; and a reference circuit to provide a constant reference voltage to said first gain stage.
Claim 2
Dependent Claim
198 words
A voltage regulator comprising: a first gain stage having an error amplifier, said error amplifier having an error output voltage that is responsive to a difference between a reference input voltage and a feedback input voltage; a second gain stage which is a transconductance amplifier being connected to receive said error output voltage, said transconductance amplifier including: (a) a current mirror connected to provide at least a portion of a first conductive path from an input terminal to a low voltage terminal and a second conductive path from said input terminal to an output terminal; and (b) current-controlling means for regulating an output current through said second conductive path, said current-controlling means configured to compare said error output voltage with a first voltage at a node on said first conductive path to provide said regulation; an output load connected to said transconductance amplifier to receive said output current to convert said output current into a regulated output voltage; a feedback path connected to provide said feedback input voltage to said error amplifier, said feedback input voltage being responsive to said regulated output voltage; and a reference circuit to provide a constant reference voltage to said first gain stage.
Claim 3
Dependent Claim
25 words
The voltage regulator of claim 1 wherein said first gain stage and said reference circuit are connected to receive operating current from said regulated voltage.
Claim 4
Dependent Claim
28 words
The voltage regulator of claim 1 further comprising a start circuit connected to turn on said reference and said error amplifier when said regulated voltage is not present.
Claim 5
Dependent Claim
52 words
The voltage regulator of claim 1 wherein said error amplifier has a pole set at a first frequency and a zero set at a second frequency and wherein said load has a pole set at a third frequency, and wherein said second and said third frequencies are greater than said first frequency.
Claim 6
Dependent Claim
50 words
The voltage regulator of claim 4 wherein said transconductance amplifier has a pole set at a fourth frequency and a zero set at a fifth frequency and said load has a pole set at said third frequency, and wherein said third and fifth frequencies are greater than said fourth frequency.
Claim 7
Dependent Claim
62 words
The voltage regulator of claim 1 wherein said current mirror includes a first transistor and a second transistor, said first transistor being positioned on said first conductive path and said second transistor being positioned on said second conductive path, said first and second transistors being connected such that control nodes of said first and second transistors are coupled to said current-controlling means.
Claim 8
Dependent Claim
15 words
The voltage regulator of claim 6 wherein said first and second transistors are metal-oxide-semiconductor transistors.
Claim 9
Dependent Claim
73 words
The voltage regulator of claim 7 wherein said first and second transistors are P-channel metal-oxide-semiconductor transistors that are connected such that sources of said first and second transistors are coupled to said input terminal, a drain of said first transistors is coupled to said low voltage terminal, a drain of said second transistor is coupled to said output terminal, and gates of said first and second transistors are coupled to said current-controlling means.
Claim 10
Dependent Claim
48 words
The voltage regulator of claim 1 wherein said current-controlling means includes a differential amplifier having two inputs connected to receive said error output voltage and said first voltage and an output to transmit a current control voltage to said current mirror for said regulation of said output current.
Claim 11
Dependent Claim
24 words
The voltage regulator of claim 1 wherein said transconductance amplifier further includes a current source connecting said output terminal to said low voltage terminal.
Claim 12
Dependent Claim
18 words
The voltage regulator of claim 10 wherein said current source is comprised of a plurality of metal-oxide-semiconductor transistors.
Claim 13
Dependent Claim
23 words
The voltage regulator of claim 1 wherein said transconductance amplifier further includes a pair of cascoded transistors operatively associated with said current mirror.
Claim 14
Dependent Claim
47 words
The voltage regulator of claim 12 wherein said transconductance amplifier further includes a resistor on said first conductive path between one of said cascoded transistors and said low voltage terminal, said resistor effectuating a voltage difference across said resistor to provide said first voltage at said node.
Claim 15
Dependent Claim
13 words
The voltage regulator of claim 12 wherein said cascoded transistors are metal-oxide-semiconductor transistors.
Claim 16
Dependent Claim
133 words
A voltage regulator comprising: a first conduction path from an input terminal to a low voltage terminal, said first conduction path having a first current; a second conduction path from said input terminal to an output terminal, said second conduction path having a second current that is generally proportional to said first current; signaling means connected to said output terminal for comparing the voltage at said output terminal to a reference voltage, said signaling means configured to generate an error signal in response to a difference between the voltage at said output voltage and said reference voltage; and current-controlling means for adjusting said second current by differentiating said error signal with the voltage at a node to regulate the voltage at said output terminal, said node being located on said first conduction path.
Claim 17
Dependent Claim
133 words
A voltage regulator comprising: a first conduction path from an input terminal to a low voltage terminal, said first conduction path having a first current; a second conduction path from said input terminal to an output terminal, said second conduction path having a second current that is generally proportional to said first current; signaling means connected to said output terminal for comparing the voltage at said output terminal to a reference voltage, said signaling means configured to generate an error signal in response to a difference between the voltage at said output voltage and said reference voltage; and current-controlling means for adjusting said second current by differentiating said error signal with the voltage at a node to regulate the voltage at said output terminal, said node being located on said first conduction path.
Claim 18
Dependent Claim
58 words
The voltage regulator of claim 15 further comprising a pass transistor on said first conduction path and a mirror transistor on said second conduction path, said pass and mirror transistors defining a current mirror in which control nodes of said pass and mirror transistors are coupled to said current-controlling means to facilitate said adjustment of said second current.
Claim 19
Dependent Claim
47 words
The voltage regulator of claim 16 further comprising a first cascoded transistor and a second cascoded transistor, said first cascoded transistor being connected between said mirror transistor and said low voltage terminal, said second cascoded transistor being connected between said pass transistor and said low voltage terminal.
Claim 20
Dependent Claim
15 words
The voltage regulator of claim 16 wherein said pass and mirror transistors are metal-oxide-semiconductor transistors.
Claim 21
Dependent Claim
48 words
The voltage regulator of claim 16 wherein said current-controlling means is a differential amplifier having a first input connected to said first conduction path at said node, a second input connected said signaling means, and an output connected to said control nodes of said pass and mirror transistors.
Claim 22
Dependent Claim
14 words
The voltage regulator of claim 15 wherein said signaling means is an error amplifier.
Claim 23
Independent Claim
143 words
A method of providing a voltage regulation comprising steps of: forming a current mirror having a first current through a first leg of said current mirror and a second current through a second leg of said current mirror, said second current having a magnitude that partially defines an output voltage; generating an error signal in response to a comparison of said output voltage to a reference voltage; differentiating said error signal with a first voltage at a node on said first leg of said current mirror; and adjusting a current flow through said current mirror to change said magnitude of said second current being drawn through said second leg of said current mirror in response to said differentiation of said error signal with said first voltage, said change in said magnitude of said second current effectuating said voltage regulation of said output voltage.
Claim 24
Independent Claim
143 words
A method of providing a voltage regulation comprising steps of: forming a current mirror having a first current through a first leg of said current mirror and a second current through a second leg of said current mirror, said second current having a magnitude that partially defines an output voltage; generating an error signal in response to a comparison of said output voltage to a reference voltage; differentiating said error signal with a first voltage at a node on said first leg of said current mirror; and adjusting a current flow through said current mirror to change said magnitude of said second current being drawn through said second leg of said current mirror in response to said differentiation of said error signal with said first voltage, said change in said magnitude of said second current effectuating said voltage regulation of said output voltage.
Claim 25
Dependent Claim
65 words
The method of claim 21 wherein said step of differentiating said error signal with said first voltage includes employing a differential amplifier having a first input and a second input, said first input being connected to said first leg of said current mirror at said node to receive said first voltage, said second input being connected to an error amplifier to receive said error signal.
Claim 26
Dependent Claim
54 words
The method of claim 22 wherein said step of adjusting said current flow through said current mirror includes transmitting a control signal from said differential amplifier to control nodes of two transistors that define said current mirror, said control signal being a result of said differentiation of said error signal with said first voltage.
Claim 27
Dependent Claim
25 words
The method of claim 22 further comprising a step of compensating any voltage dependency of said current mirror by employing a plurality of cascoded transistors.
References Cited (Backward Citations)
US4218647A
Cited
US4908566A
Cited
US4920309A
Cited
US5168209A
Cited
US5731694A
Cited
US5539603A
Cited
US5559423A
Cited
US5514947A
Cited
US5648718A
Cited
US5672959A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2002-03-29 | 2002-09-28 | 2003-03-30 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2006-03-29 | 2006-09-28 | 2007-03-30 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2010-03-29 | 2010-09-28 | 2011-03-30 | $7700.00 | Window Closed / Lapsed |