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US5864227A Expired / Lapsed US ⏱️ 0.0 years remaining

Voltage regulator with output pull-down circuit

Assignee: Texas Instruments Inc
•
Filing: 1998-03-12
•
Granted: 1999-01-26
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Expires: 2018-03-12
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Abstract

Abstract A voltage regulator circuit includes: an output transistor MP X coupled between a voltage supply node V CC and an output node V OUT ; an amplifier A 1 coupled to the output transistor MP X for controlling the response of the output transistor MP X ; feedback circuitry R 1 and R 2 connected between the output node V OUT and the amplifier A 1 , the feedback circuitry R 1 and R 2 providing feedback to the amplifier A 1 ; and a pull-down circuit PD 1 coupled to the output node V OUT .

Inventors

  • 👤 Robert B. Borden
  • 👤 Mark Pulkin

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-30 19:03
CPC Classifications
G; G05; G05F; G05F1/00; G05F1/10; G05F1/46; G05F1/618; G05F3/00; G05F3/02; G05F3/08; G05F3/10; G05F3/16; G05F3/20; G05F3/24; G05F3/242; G05F3/247

Claims Analysis

Total Claims: 10
Claim 1
Independent Claim 102 words
A voltage regulator circuit comprising: an output transistor coupled between a voltage supply node and an output node; an amplifier coupled to the output transistor for controlling the response of the output transistor; feedback circuitry connected between the output node and the amplifier, the feedback circuitry providing feedback to the amplifier; a pull-down transistor coupled to the output node; and a comparator coupled to the pull-down transistor for controlling the response of the pull-down transistor, a first input of the comparator is coupled to an output of the amplifier and a second input of the comparator is coupled to a reference node.
Claim 2
Dependent Claim 102 words
A voltage regulator circuit comprising: an output transistor coupled between a voltage supply node and an output node; an amplifier coupled to the output transistor for controlling the response of the output transistor; feedback circuitry connected between the output node and the amplifier, the feedback circuitry providing feedback to the amplifier; a pull-down transistor coupled to the output node; and a comparator coupled to the pull-down transistor for controlling the response of the pull-down transistor, a first input of the comparator is coupled to an output of the amplifier and a second input of the comparator is coupled to a reference node.
Claim 3
Dependent Claim 63 words
The circuit of claim 1, wherein the feedback circuitry includes a first resistor and a second resistor connected in series, the output transistor is coupled to a first end of the first resistor, a second end of the first resistor is coupled to a first end of the second resistor, and the amplifier is coupled to the first end of the second resistor.
Claim 4
Dependent Claim 15 words
The circuit of claim 1, further comprising a reference voltage source coupled to the amplifier.
Claim 5
Dependent Claim 129 words
A voltage regulator circuit comprising: an output MOS transistor having a gate, a source, and a drain; an amplifier coupled to the gate of the MOS transistor; feedback circuitry coupled to the drain of the MOS transistor; a feedback line coupling the feedback circuitry to a first input of the amplifier; a reference voltage source coupled to a second input of the amplifier; a supply voltage coupled to the source of the MOS transistor; a pull-down MOS transistor coupled to the output node; and a comparator coupled to the pull-down MOS transistor for controlling the response of the pull-down MOS transistor, a first input of the comparator is coupled to an output of the amplifier and a second input of the comparator is coupled to a trip voltage node.
Claim 6
Dependent Claim 129 words
A voltage regulator circuit comprising: an output MOS transistor having a gate, a source, and a drain; an amplifier coupled to the gate of the MOS transistor; feedback circuitry coupled to the drain of the MOS transistor; a feedback line coupling the feedback circuitry to a first input of the amplifier; a reference voltage source coupled to a second input of the amplifier; a supply voltage coupled to the source of the MOS transistor; a pull-down MOS transistor coupled to the output node; and a comparator coupled to the pull-down MOS transistor for controlling the response of the pull-down MOS transistor, a first input of the comparator is coupled to an output of the amplifier and a second input of the comparator is coupled to a trip voltage node.
Claim 7
Dependent Claim 14 words
The circuit of claim 4 wherein the output MOS transistor is a PMOS transistor.
Claim 8
Dependent Claim 14 words
The circuit of claim 4 wherein the pull-down MOS transistor is a PMOS transistor.
Claim 9
Dependent Claim 20 words
The circuit of claim 4, wherein the feedback circuitry includes a first resistor and a second resistor connected in series.
Claim 10
Dependent Claim 54 words
The circuit of claim 7, wherein the drain of the output MOS transistor is coupled to a first end of the first resistor, a second end of the first resistor is coupled to a first end of the second resistor, and the feedback line is coupled to the first end of the second resistor.

References Cited (Backward Citations)

US4536699A Cited
US5548205A Cited
US5648718A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 2002-01-25 2002-07-27 2003-01-26 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2006-01-25 2006-07-27 2007-01-26 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2010-01-25 2010-07-27 2011-01-26 $7700.00 Window Closed / Lapsed

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