Patent US6465340B1 successfully refreshed from Google Patents.
US6465340B1
Expired / Lapsed
US
⏱️ 0.0 years remaining
Via filled dual damascene structure with middle stop layer and method for making the same
Assignee: Advanced Micro Devices Inc
•
Filing: 2001-02-06
•
Granted: 2002-10-15
•
Expires: 2021-02-06
Abstract
Abstract An interconnect structure and method of forming the same in which a first inorganic low k dielectric material is deposited over a conductive layer to form a first dielectric layer. An etch stop layer is formed on the first dielectric layer. The etch stop layer and the first dielectric layer are etched to form a via in the first dielectric layer. A second low k dielectric material is deposited within the via and over the etch stop layer to form a second dielectric layer over the via and the etch stop layer. The re-filled via is simultaneously etched with the second dielectric layer in which a trench is formed. A portion of the trench is directly over the via. The re-opened via and the trench are filled with a conductive material.
Inventors
- 👤 Fei Wang
- 👤 Lynne A. Okada
- 👤 Ramkumar Subramanian
- 👤 Calvin T. Gabriel
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-03 20:12
CPC Classifications
H; H10; H10W; H10W20/00; H10W20/01; H10W20/071; H10W20/081; H10W20/084; H10W20/085; H10W20/0886
Claims Analysis
Total Claims: 7
Claim 1
Independent Claim
133 words
A method of forming an interconnect structure, comprising the steps of: depositing a first low k dielectric material over a conductive layer to form a first dielectric layer; forming an etch stop layer on the first dielectric layer; etching the etch stop layer and the first dielectric layer to form a via in the first dielectric layer; depositing a second low k dielectric material in the via and over the etch stop layer to form a second dielectric layer over the via and the etch stop layer; simultaneously etching the via and a trench in the second dielectric layer, with at least a portion of the trench being directly over the via; wherein the first low k dielectric material and the second low k dielectric material are both inorganic low k dielectric materials.
Claim 2
Independent Claim
133 words
A method of forming an interconnect structure, comprising the steps of: depositing a first low k dielectric material over a conductive layer to form a first dielectric layer; forming an etch stop layer on the first dielectric layer; etching the etch stop layer and the first dielectric layer to form a via in the first dielectric layer; depositing a second low k dielectric material in the via and over the etch stop layer to form a second dielectric layer over the via and the etch stop layer; simultaneously etching the via and a trench in the second dielectric layer, with at least a portion of the trench being directly over the via; wherein the first low k dielectric material and the second low k dielectric material are both inorganic low k dielectric materials.
Claim 3
Dependent Claim
27 words
The method of claim 1 , wherein the first low k dielectric material and the second low k dielectric material are different inorganic low k dielectric materials.
Claim 4
Dependent Claim
28 words
The method of claim 1 , wherein the first low k dielectric material and the second low k dielectric material are the same inorganic low k dielectric materials.
Claim 5
Dependent Claim
18 words
The method of claim 1 , further comprising depositing conductive material simultaneously in the via and the trench.
Claim 6
Dependent Claim
12 words
The method of claim 4 , wherein the conductive material is copper.
Claim 7
Dependent Claim
32 words
The method of claim 1 , wherein the first and second low k dielectric materials are selected from at least one of methyl silsesquioxane (MSQ), hydrogen silsesquioxane (HSQ), and fluorine tetraethylorthosilicate (FTEOS).
References Cited (Backward Citations)
US6001730A
Cited
US6127258A
Cited
US6287961B1
Cited
US6245670B1
Cited
US6259160B1
Cited
US6252290B1
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2005-10-14 | 2006-04-15 | 2006-10-15 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2009-10-14 | 2010-04-15 | 2010-10-15 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2013-10-14 | 2014-04-15 | 2014-10-15 | $7700.00 | Window Closed / Lapsed |