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US6441690B1 Expired / Lapsed US ⏱️ 0.0 years remaining

Phase-locked loop frequency synthesizer

Assignee: Alcatel Lucent SAS
•
Filing: 2000-08-25
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Granted: 2002-08-27
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Expires: 2020-08-25
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Abstract

Abstract A phase-locked loop frequency synthesizer includes circuitry which determines the real gain of a voltage-controlled oscillator from at least one measurement parameter and delivers a signal representative of the real gain of the voltage-controlled oscillator.

Inventors

  • 👤 Patrick Savelli
  • 👤 Christian Massy

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-02 18:42
CPC Classifications
H; H03; H03C; H03C3/00; H03C3/02; H03C3/09; H03C3/0908; H03C3/0983; H03C3/0941; H03C3/095; H03C3/0975; H03L; H03L7/00; H03L7/06; H03L7/16; H03L7/18; H03L7/183; H03L7/187; H03L7/189

Claims Analysis

Total Claims: 5
Claim 1
Independent Claim 264 words
A frequency synthesizer including a phase regulation loop including: a voltage-controlled oscillator; a reference oscillator; a phase-locked loop receiving as inputs an output signal from said voltage-controlled oscillator and an output signal from said reference oscillator, delivering at its output a control voltage to an input of said voltage-controlled oscillator, and including a phase comparator connected directly to the output of said reference oscillator and to an output of said voltage-controlled oscillator via a feedback loop including a counter-divider; means for feeding a modulation signal between said phase comparator and the input of said voltage-controlled oscillator; modulation compensation means for preparing a compensation signal from said modulation signal and for feeding said compensation signal into said feedback loop upstream of said counter-divider to cancel modulation of a synthesizer output signal, at the output of said voltage-controlled oscillator, applied to an input of said counter-divider; determination means for determining the real gain of said voltage-controlled oscillator from at least one measurement parameter, wherein said determination means are adapted to deliver a signal representative of the real gain of said voltage-controlled oscillator; divider means having a first input adapted to receive from said determination means the signal representative of the real gain of said voltage-controlled oscillator, and a second input adapted to receive said modulation signal; and an output delivering said modulation signal, divided by said real gain of said voltage-controlled oscillator, to an input of a summation circuit connected between the input of said voltage-controlled oscillator and a loop filter connected between the output of said phase comparator and the input of said voltage-controlled oscillator.
Claim 2
Dependent Claim 264 words
A frequency synthesizer including a phase regulation loop including: a voltage-controlled oscillator; a reference oscillator; a phase-locked loop receiving as inputs an output signal from said voltage-controlled oscillator and an output signal from said reference oscillator, delivering at its output a control voltage to an input of said voltage-controlled oscillator, and including a phase comparator connected directly to the output of said reference oscillator and to an output of said voltage-controlled oscillator via a feedback loop including a counter-divider; means for feeding a modulation signal between said phase comparator and the input of said voltage-controlled oscillator; modulation compensation means for preparing a compensation signal from said modulation signal and for feeding said compensation signal into said feedback loop upstream of said counter-divider to cancel modulation of a synthesizer output signal, at the output of said voltage-controlled oscillator, applied to an input of said counter-divider; determination means for determining the real gain of said voltage-controlled oscillator from at least one measurement parameter, wherein said determination means are adapted to deliver a signal representative of the real gain of said voltage-controlled oscillator; divider means having a first input adapted to receive from said determination means the signal representative of the real gain of said voltage-controlled oscillator, and a second input adapted to receive said modulation signal; and an output delivering said modulation signal, divided by said real gain of said voltage-controlled oscillator, to an input of a summation circuit connected between the input of said voltage-controlled oscillator and a loop filter connected between the output of said phase comparator and the input of said voltage-controlled oscillator.
Claim 3
Dependent Claim 72 words
The synthesizer claimed in claim 1 , wherein said determination means include measuring means for measuring the output voltage of said loop filter at a first frequency and at a second frequency, and a calculation unit for calculating said real gain of said voltage-controlled oscillator by dividing the difference between said first and second frequencies by the difference between first and second control voltages respectively measured at said first and second frequencies.
Claim 4
Dependent Claim 38 words
The synthesizer claimed in claim 2 , wherein said determination means further include an analog-to-digital converter adapted to convert a voltage measured by said measuring means into a digital signal and said calculation unit is a digital unit.
Claim 5
Dependent Claim 111 words
The synthesizer claimed in claim 1 , wherein said modulation compensation means include a multiplier for multiplying said modulation signal by 2π, an accumulator whose input is connected to the output of said multiplier, a unit for forming an in-phase signal I and a quadrature signal Q, a first mixer, and a second mixer, wherein each mixer is in a branch of said feedback loop upstream of said counter-divider, said first mixer is adopted to mix said in-phase signal I with the output signal of said voltage-controlled oscillator and said second mixer is adapted to mix said quadrature signal Q with the output signal of said voltage-controlled oscillator phase-shifted by π/2.

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USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 2005-08-26 2006-02-25 2006-08-27 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2009-08-26 2010-02-25 2010-08-27 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2013-08-26 2014-02-25 2014-08-27 $7700.00 Window Closed / Lapsed

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