US5207491A
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Fast-switching frequency synthesizer
Assignee: Motorola Solutions Inc
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Filing: 1992-04-07
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Granted: 1993-05-04
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Expires: 2012-04-07
Abstract
Abstract A fast-switching frequency synthesizer utilizes a time-varying presteering voltage injection at the voltage controlled oscillator ("VCO") with feedback to allow the VCO and synthesizer to rapidly change between two given frequencies.
Inventors
- 👤 Alan P. Rottinghaus
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-29 22:33
CPC Classifications
H; H03; H03C; H03C3/00; H03C3/02; H03C3/09; H03C3/0908; H03C3/095; H03L; H03L7/00; H03L7/06; H03L7/16; H03L7/18; H03L7/183; H03L7/187; H03L7/189
Claims Analysis
Total Claims: 22
Claim 1
Independent Claim
152 words
A synthesizer for generating a frequency, comprising: a voltage controlled oscillator ("VCO") having a voltage control line and an output, a phase detector having a frequency reference, an input and an output, a frequency divider having an input and an output, the VCO output coupled to the frequency divider input, the frequency divider output coupled to the phase detector input, the phase detector output coupled to the voltage control line, and means for controlling the synthesizer frequency, comprising: changing means for changing the frequency divider to a first divisor value; injecting means for injecting a first waveform to the voltage control line at a fixed time with respect to changing to the first divisor value; sampling means for detecting and sampling the phase detector output responsive to changing to the first divisor value thereby forming a first sample signal; adjusting means for adjusting the first waveform based on the first sample signal.
Claim 2
Dependent Claim
152 words
A synthesizer for generating a frequency, comprising: a voltage controlled oscillator ("VCO") having a voltage control line and an output, a phase detector having a frequency reference, an input and an output, a frequency divider having an input and an output, the VCO output coupled to the frequency divider input, the frequency divider output coupled to the phase detector input, the phase detector output coupled to the voltage control line, and means for controlling the synthesizer frequency, comprising: changing means for changing the frequency divider to a first divisor value; injecting means for injecting a first waveform to the voltage control line at a fixed time with respect to changing to the first divisor value; sampling means for detecting and sampling the phase detector output responsive to changing to the first divisor value thereby forming a first sample signal; adjusting means for adjusting the first waveform based on the first sample signal.
Claim 3
Dependent Claim
21 words
The synthesizer of claim 1 wherein the adjusting means includes means for adjusting the first waveform based on a first algorithm.
Claim 4
Dependent Claim
32 words
The synthesizer of claim 2 wherein the first waveform is based on the impulse response of a first finite impulse response ("FIR") filter comprising a first shift register having first tap values.
Claim 5
Dependent Claim
22 words
The synthesizer of claim 3 wherein the first waveform includes a plurality of transient presteering steps based on the first tap values.
Claim 6
Dependent Claim
23 words
The synthesizer of claim 4 wherein the adjusting means includes means for adjusting the first tap values based on the first sample signal.
Claim 7
Dependent Claim
97 words
The synthesizer of claim 1 wherein: the changing means further includes means for changing the frequency divider to a second divisor value; the injecting means further includes means for injecting a second waveform to the voltage control line at a fixed time with respect to changing to the second divisor value; the sampling means further includes means for detecting and sampling the phase detector output responsive to changing to the second divisor value thereby forming a second sample signal; and, the adjusting means further includes means for adjusting the second waveform based on the second sample signal.
Claim 8
Dependent Claim
21 words
The synthesizer of claim 6 wherein the adjusting means includes means for adjusting the second waveform based on a second algorithm.
Claim 9
Dependent Claim
29 words
The synthesizer of claim 7 wherein the second waveform is based on the impulse response of a second FIR filter comprising a second shift register having second tap values.
Claim 10
Dependent Claim
22 words
The synthesizer of claim 8 wherein the second waveform includes a plurality of transient presteering steps based on the second tap values.
Claim 11
Dependent Claim
23 words
The synthesizer of claim 9 wherein the adjusting means includes means for adjusting the second tap values based on the second sample signal.
Claim 12
Dependent Claim
149 words
In a synthesizer for generating a frequency, comprising: a voltage controlled oscillator ("VCO") having a voltage control line and an output, a phase detector having a frequency reference, an input and an output, a frequency divider having an input and an output, the VCO output coupled to the frequency divider input, the frequency divider output coupled to the phase detector input, the phase detector output coupled to the voltage control line, and a method for controlling the synthesizer frequency, comprising the steps of: (a) changing the frequency divider to a first divisor value; (b) injecting a first waveform to the voltage control line at a fixed time with respect to changing to the first divisor value; (c) detecting and sampling the phase detector output responsive to changing to the first divisor value thereby forming a first sample signal; (d) adjusting the first waveform based on the first sample signal.
Claim 13
Dependent Claim
149 words
In a synthesizer for generating a frequency, comprising: a voltage controlled oscillator ("VCO") having a voltage control line and an output, a phase detector having a frequency reference, an input and an output, a frequency divider having an input and an output, the VCO output coupled to the frequency divider input, the frequency divider output coupled to the phase detector input, the phase detector output coupled to the voltage control line, and a method for controlling the synthesizer frequency, comprising the steps of: (a) changing the frequency divider to a first divisor value; (b) injecting a first waveform to the voltage control line at a fixed time with respect to changing to the first divisor value; (c) detecting and sampling the phase detector output responsive to changing to the first divisor value thereby forming a first sample signal; (d) adjusting the first waveform based on the first sample signal.
Claim 14
Dependent Claim
23 words
The method of claim 11 wherein the adjusting step (d) includes a step of adjusting the first waveform based on a first algorithm.
Claim 15
Dependent Claim
32 words
The method of claim 12 wherein the first waveform is based on the impulse response of a first finite impulse response ("FIR") filter comprising a first shift register having first tap values.
Claim 16
Dependent Claim
22 words
The method of claim 13 wherein the first waveform includes a plurality of transient presteering steps based on the first tap values.
Claim 17
Dependent Claim
25 words
The method of claim 14 wherein the adjusting step (d) includes a step of adjusting the first tap values based on the first sample signal.
Claim 18
Dependent Claim
77 words
The method of claim 11 including the further steps of: (e) changing the frequency divider to a second divisor value; (f) injecting a second waveform to the voltage control line at a fixed time with respect to changing to the second divisor value; (g) detecting and sampling the phase detector output responsive to changing to the second divisor value thereby forming a second sample signal; and, (h) adjusting the second waveform based on the second sample signal.
Claim 19
Dependent Claim
23 words
The method of claim 16 wherein the adjusting step (h) includes a step of adjusting the second waveform based on a second algorithm.
Claim 20
Dependent Claim
29 words
The method of claim 17 wherein the second waveform is based on the impulse response of a second FIR filter comprising a second shift register having second tap values.
Claim 21
Dependent Claim
22 words
The method of claim 18 wherein the second waveform includes a plurality of transient presteering steps based on the second tap values.
Claim 22
Dependent Claim
25 words
The method of claim 19 wherein the adjusting step (h) includes a step of adjusting the second tap values based on the second sample signal.
References Cited (Backward Citations)
US4006429A
Cited
US4105948A
Cited
US4511858A
Cited
US4410860A
Cited
US4943786A
Cited
US4634998A
Cited
US5027087A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1996-05-03 | 1996-11-02 | 1997-05-04 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2000-05-03 | 2000-11-02 | 2001-05-04 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2004-05-03 | 2004-11-02 | 2005-05-04 | $7700.00 | Window Closed / Lapsed |