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US6441433B1
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Method of making a multi-thickness silicide SOI device
Assignee: Advanced Micro Devices Inc
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Filing: 2001-04-02
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Granted: 2002-08-27
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Expires: 2021-04-02
Abstract
Abstract A transistor device formed on a semiconductor-on-insulator (SOI) substrate with a buried oxide (BOX) layer disposed thereon and an active layer disposed on the BOX layer having active regions defined by isolation trenches. The device includes a gate defining a channel interposed between a source and a drain formed within the active region of the SOI substrate. Further, the device includes a multi-thickness silicide layer formed on the main source and drain regions and source and drain extension regions wherein a portion of the multi-thickness silicide layer which is formed on the source and drain extension regions is thinner than a portion of the silicide layer which is formed on the main source and drain regions. The device further includes a second thin silicide layer formed on a polysilicon electrode of the gate.
Inventors
- 👤 William G. En
- 👤 Srinath Krishnan
- 👤 Dong-Hyuk Ju
- 👤 Bin Yu
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-09 03:02
CPC Classifications
H; H10; H10D; H10D30/00; H10D30/01; H10D30/021; H10D30/0212; H10D30/0213; H10D30/031; H10D30/0321; H10D30/0323; H10D30/60; H10D30/67; H10D30/6704; H10D30/6713; H10D30/6715; H10D30/6729; H10D30/6737; H10D30/674; H10D30/6741; H10D30/6743; H10D30/6758; H10D64/00; H10D64/01; H10D64/011; H10D64/0111; H10D64/0112; H10D64/015; H10D64/021
Claims Analysis
Total Claims: 17
Claim 1
Independent Claim
199 words
A transistor device formed on a semiconductor substrate having active regions defined by isolation trenches, the device comprising: a gate defining a channel interposed between a source and a drain formed within one of the active regions of the semiconductor substrate wherein the source and the drain include main source and drain regions and source and drain extension regions; and a multi-thickness silicide layer formed on the main source and drain regions and the source and drain extension regions wherein a portion of the multi-thickness silicide layer which is formed on the source and drain extension regions is thinner than a portion of the multi-thickness silicide layer which is formed on the main source and drain regions; wherein the semiconductor substrate is a semiconductor-on-insulator (SOI) substrate with a buried oxide (BOX) layer interposed between an active layer and a main semiconductor substrate and wherein the active regions are further defined by the BOX layer wherein a portion of the multi-thickness silicide layer which is formed on polysilicon regions of the main source and drain regions is thicker than the portion of the multi-thickness silicide layer which is formed on main junction regions of the main source and drain regions.
Claim 2
Dependent Claim
199 words
A transistor device formed on a semiconductor substrate having active regions defined by isolation trenches, the device comprising: a gate defining a channel interposed between a source and a drain formed within one of the active regions of the semiconductor substrate wherein the source and the drain include main source and drain regions and source and drain extension regions; and a multi-thickness silicide layer formed on the main source and drain regions and the source and drain extension regions wherein a portion of the multi-thickness silicide layer which is formed on the source and drain extension regions is thinner than a portion of the multi-thickness silicide layer which is formed on the main source and drain regions; wherein the semiconductor substrate is a semiconductor-on-insulator (SOI) substrate with a buried oxide (BOX) layer interposed between an active layer and a main semiconductor substrate and wherein the active regions are further defined by the BOX layer wherein a portion of the multi-thickness silicide layer which is formed on polysilicon regions of the main source and drain regions is thicker than the portion of the multi-thickness silicide layer which is formed on main junction regions of the main source and drain regions.
Claim 3
Dependent Claim
23 words
The transistor device according to claim 1 , wherein the multi-thickness silicide layer includes at least two layers of silicide of different species.
Claim 4
Dependent Claim
55 words
The transistor device according to claim 2 , wherein the least two layers of silicide of different species include; a first silicide layer which is formed on the source and drain regions and extends into the source and drain extension regions; a second silicide layer which is formed on the main source and drain regions.
Claim 5
Dependent Claim
79 words
The transistor device according to claim 2 , wherein the least two layers of silicide of different species include; a first silicide layer which is formed on the source and drain regions and extends into the source and drain extension regions with a thickness in a range between 25 Å and 100 Å; a second silicide layer which is formed on the main source and drain regions with a thickness in a range between 50 Å and 250 Å.
Claim 6
Dependent Claim
20 words
The transistor device according to claim 1 , including a silicide layer formed on a polysilicon electrode of the gate.
Claim 7
Dependent Claim
39 words
The transistor device according to claim 1 , wherein a thickness of the portion of the multi-thickness silicide layer which is formed on the source and drain extension regions is in a range between 25 Å and 100 Å.
Claim 8
Dependent Claim
20 words
The transistor device according to claim 6 , including a silicide layer formed on a polysilicon electrode of the gate.
Claim 9
Dependent Claim
52 words
The transistor device according to claim 6 , wherein the thickness of the portion of the multi-thickness silicide layer which is formed on the main source and drain regions is in a range between 50 Å and 250 Å and including a silicide layer formed on a polysilicon electrode of the gate.
Claim 10
Dependent Claim
42 words
The transistor device according to claim 6 , wherein the thickness of the portion of the multi-thickness silicide layer which is formed on polysilicon regions of the main source and drain regions is in a range between 100 Å and 300 Å.
Claim 11
Dependent Claim
39 words
The transistor device according to claim 1 , wherein a thickness of the portion of the multi-thickness silicide layer which is formed on the main source and drain regions is in a range between 50 Å and 250 Å.
Claim 12
Dependent Claim
39 words
The transistor device according to claim 10 , wherein the thickness of the portion of the multi-thickness silicide layer which is formed on the source and drain extension regions is in a range between 25 Å and 100 Å.
Claim 13
Dependent Claim
43 words
The transistor device according to claim 10 , wherein a thickness of the portion of the multi-thickness silicide layer which is formed on the polysilicon regions of the main source and drain regions is in a range between 100 Å and 300 Å.
Claim 14
Dependent Claim
17 words
The transistor device according to claim 1 , wherein the semiconductor-on-insulator substrate is a germanium-on-insulator (GOI) substrate.
Claim 15
Independent Claim
187 words
A method of fabricating a transistor device formed on a semiconductor substrate having active regions defined by isolation trenches, the method comprising the steps of: forming a gate defining a channel interposed between a source and a drain formed within one of the active regions of the semiconductor substrate; forming a multi-thickness silicide layer on the main source and drain regions and source and drain extension regions wherein a portion of the multi-thickness silicide layer which is formed on the source and drain extension regions is thinner than a portion of the silicide layer which is formed on the main source and drain regions wherein a portion of the multi-thickness silicide layer which is formed on polysilicon regions of the main source and drain regions is thicker than the portion of the multi-thickness silicide layer which is formed on main junction regions of the main source and drain regions; and wherein the semiconductor substrate is a semiconductor-on-insulator (SOI) substrate with a buried oxide (BOX) layer interposed between an active layer and a main semiconductor substrate and wherein the active regions are further defined by the BOX layer.
Claim 16
Independent Claim
187 words
A method of fabricating a transistor device formed on a semiconductor substrate having active regions defined by isolation trenches, the method comprising the steps of: forming a gate defining a channel interposed between a source and a drain formed within one of the active regions of the semiconductor substrate; forming a multi-thickness silicide layer on the main source and drain regions and source and drain extension regions wherein a portion of the multi-thickness silicide layer which is formed on the source and drain extension regions is thinner than a portion of the silicide layer which is formed on the main source and drain regions wherein a portion of the multi-thickness silicide layer which is formed on polysilicon regions of the main source and drain regions is thicker than the portion of the multi-thickness silicide layer which is formed on main junction regions of the main source and drain regions; and wherein the semiconductor substrate is a semiconductor-on-insulator (SOI) substrate with a buried oxide (BOX) layer interposed between an active layer and a main semiconductor substrate and wherein the active regions are further defined by the BOX layer.
Claim 17
Dependent Claim
23 words
The method according to claim 14 , including the additional step of forming a silicide layer on a polysilicon electrode of the gate.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2005-08-26 | 2006-02-25 | 2006-08-27 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2009-08-26 | 2010-02-25 | 2010-08-27 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2013-08-26 | 2014-02-25 | 2014-08-27 | $7700.00 | Window Closed / Lapsed |