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US6433567B1 Expired / Lapsed US ⏱️ 0.0 years remaining

CMOS integrated circuit and timing signal generator using same

Assignee: Advantest Corp
•
Filing: 2000-04-21
•
Granted: 2002-08-13
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Expires: 2020-04-21
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Abstract

Abstract A CMOS integrated circuit to be used in a semiconductor test system for generating timing signals of high timing resolution and accuracy for testing semiconductor devices. The CMOS integrated circuit includes a heater circuit for generating heat based on electric current flowing there through, and a heater control circuit for detecting an amount of total electric current flowing through a timing generator block for generating timing signals, a control circuit block for providing timing data to the timing generator block, and the heater circuit and providing a control voltage to the heater circuit based on the amount of total current detected to control the current flowing through the heater circuit through a negative feedback loop.

Inventors

  • 👤 Toshiyuki Okayasu

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-08 14:22
CPC Classifications
G; G01; G01R; G01R31/00; G01R31/28; G01R31/317; G01R31/3181; G01R31/319; G01R31/31917; G01R31/31922

Claims Analysis

Total Claims: 8
Claim 1
Independent Claim 165 words
A timing signal generator, comprising: a timing generator block for producing timing signals of specified delay timings by adding the specified delay timings to input clock signals; a control logic block for providing timing data specifying said delay timings to the timing generator block for controlling the delay timings of the timing signals; a heater circuit for generating heat based on heater current flowing there through to raise temperature of said timing generator block; a heater control circuit for detecting an amount of total electric current flowing through the timing generator block, the control logic block, and the heater circuit and providing a control voltage to the heater circuit based on the amount of total electric current detected to control the heater current flowing through the heater circuit through a negative feedback loop; wherein the heater circuit, the timing generator block and the control logic block are provided within a common CMOS integrated circuit, thereby maintaining constant total electric current in the CMOS integrated circuit.
Claim 2
Dependent Claim 165 words
A timing signal generator, comprising: a timing generator block for producing timing signals of specified delay timings by adding the specified delay timings to input clock signals; a control logic block for providing timing data specifying said delay timings to the timing generator block for controlling the delay timings of the timing signals; a heater circuit for generating heat based on heater current flowing there through to raise temperature of said timing generator block; a heater control circuit for detecting an amount of total electric current flowing through the timing generator block, the control logic block, and the heater circuit and providing a control voltage to the heater circuit based on the amount of total electric current detected to control the heater current flowing through the heater circuit through a negative feedback loop; wherein the heater circuit, the timing generator block and the control logic block are provided within a common CMOS integrated circuit, thereby maintaining constant total electric current in the CMOS integrated circuit.
Claim 3
Dependent Claim 42 words
A timing signal generator as defined in claim 1 , further comprising a voltage regulator for supplying a source voltage commonly to the timing generator block, the control logic block and the heater circuit and controlling the source voltage to be constant.
Claim 4
Dependent Claim 50 words
A timing signal generator as defined in claim 1 , wherein the heater control circuit includes a current detection resistor for detecting said total electric current, a differential amplifier provided with a voltage across the current detection resistor at its one input, and a reference voltage at its another input.
Claim 5
Dependent Claim 36 words
A timing signal generator as defined in claim 1 , wherein the heater circuit is comprised of a semiconductor circuit for controlling an amount of heater current flowing through the heater cells by a control signal.
Claim 6
Dependent Claim 39 words
A timing signal generator as defined in claim 1 , wherein the heater current flowing through the heater circuit can be shut down by a semiconductor circuit which cuts off the heater current by application of a control signal.
Claim 7
Dependent Claim 18 words
A timing signal generator as defined in claim 4 , wherein the semiconductor circuit is a MOSFET device.
Claim 8
Dependent Claim 23 words
A timing signal generator as defined in claim 5 , wherein the semiconductor circuit for cutting-off the heater current is a MOSFET device.

References Cited (Backward Citations)

US4165642A Cited
US4734641A Cited
US5309090A Cited
US5414370A Cited
US5473259A Cited
US5886564A Cited
US5911897A Cited
JP2001007297A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 2005-08-12 2006-02-11 2006-08-13 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2009-08-12 2010-02-11 2010-08-13 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2013-08-12 2014-02-11 2014-08-13 $7700.00 Window Closed / Lapsed

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