US5473259A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Semiconductor device tester capable of simultaneously testing a plurality of integrated circuits at the same temperature
Assignee: NEC Corp
•
Filing: 1994-12-29
•
Granted: 1995-12-05
•
Expires: 2014-12-29
Abstract
Abstract In an IC tester configured to simultaneously test a plurality of test ICs, each of the test ICs includes a temperature sensor part for detecting the temperature of the test IC itself. A controller receives a temperature detection signal from each test IC and controls a plurality of pulse generators each provided for supplying a pulse signal to a corresponding one of the test ICs. Each pulse generator is controlled by the controller to change the frequency of the pulse signal so as to maintain the temperature of the corresponding test IC at a target temperature in common to all the test ICs to permit simultaneous testing in the IC tester.
Inventors
- 👤 Kunihiro Takeda
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-08 14:20
CPC Classifications
G; G01; G01R; G01R31/00; G01R31/28; G01R31/2851; G01R31/2855; G01R31/2856; G01R31/2872; G01R31/2874
Claims Analysis
Total Claims: 6
Claim 1
Independent Claim
155 words
A semiconductor device tester comprising a testing apparatus having an internal space in which a plurality of test ICs are located, a first temperature measuring means for measuring an internal temperature of the testing apparatus, a second temperature measuring means for measuring the temperature of each of the test ICs, a controller connected to the first measuring means and the second measuring means and for generating a first control signal in response to a signal from the first measuring means and for generating second control signals in response to input signals from the second measuring means, a heating-cooling device responding to the first control signal to control the internal temperature of the testing apparatus, and pulse generator means supplying a pulse signal to each IC, and responding to the second control signals for changing a frequency of each pulse signal so as to maintain the temperature of each test IC at the same target temperature.
Claim 2
Dependent Claim
155 words
A semiconductor device tester comprising a testing apparatus having an internal space in which a plurality of test ICs are located, a first temperature measuring means for measuring an internal temperature of the testing apparatus, a second temperature measuring means for measuring the temperature of each of the test ICs, a controller connected to the first measuring means and the second measuring means and for generating a first control signal in response to a signal from the first measuring means and for generating second control signals in response to input signals from the second measuring means, a heating-cooling device responding to the first control signal to control the internal temperature of the testing apparatus, and pulse generator means supplying a pulse signal to each IC, and responding to the second control signals for changing a frequency of each pulse signal so as to maintain the temperature of each test IC at the same target temperature.
Claim 3
Dependent Claim
61 words
A semiconductor device tester claimed in claim 1 wherein each of said test ICs includes a function part which is necessary for an ordinary use and a temperature sensor part for detecting the temperature of the test IC itself, an output of said temperature sensor part of each test IC being supplied to said controller through said second temperature measuring means.
Claim 4
Dependent Claim
24 words
A semiconductor device tester claimed in claim 2 wherein said temperature sensor part is formed of a semiconductor device formed in said test IC.
Claim 5
Dependent Claim
60 words
A semiconductor device tester claimed in claim 2 wherein each of said test ICs is so configured that, when a predetermined pulse signal is input into a predetermined one of a plurality of signal input/output terminals of the test IC, said temperature sensor part of the test is connected to a different predetermined one said plurality of signal input/output terminals.
Claim 6
Dependent Claim
59 words
A semiconductor device tester claimed in claim 1 wherein said pulse generator means includes a plurality of pulse generators each of which is connected to a corresponding one of said test ICs and each of which is controlled by said controller so as to supply said corresponding test IC with said pulse having a frequency controlled by said controller.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1998-12-04 | 1999-06-05 | 1999-12-05 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2002-12-04 | 2003-06-05 | 2003-12-05 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2006-12-04 | 2007-06-05 | 2007-12-05 | $7700.00 | Window Closed / Lapsed |