Vertical surface mount apparatus with thermal carrier

Claim 1

A vertically mounted semiconductor device package assembly for use in a vertical position on a substrate, comprising: a semiconductor die package including an encapsulated semiconductor die, said semiconductor die package having a first surface having a first size, a second surface having a second size substantially the same as said first size of said first surface, a lead edge, a first end surface, a second end surface, and a plurality of lead pins extending along said lead edge configured to mount to said substrate, said plurality of lead pins comprising gull-wing zig-zag lead pins connected to said encapsulated semiconductor die; and a carrier device comprising a thermally conductive member having a pair of insert leads, one insert lead of said pair of insert leads connected to an end of said thermally conductive member extending therefrom configured to vertically mount said carrier device to said substrate, said pair of insert leads offset from said plurality of lead pins of said semiconductor die package mounted thereto, said carrier device substantially conforming to a surface area of said first surface of said semiconductor die package, said carrier device adhesively connected to said first surface of said semiconductor die package and connected by an interference fit by engagement with portions of said pair of insert leads providing a heat sink for said semiconductor die package, said carrier device including a first portion including one of said pair of insert leads and a second portion including another of said pair of insert leads, said first portion and said second portion of said carrier device being located substantially adjacent said first end surface and said second end surface of said semiconductor die package.

Claim 23

A method of forming a vertical mount semiconductor device chip package assembly for substantially vertically mounting to a substrate, comprising: forming a semiconductor die package including an encapsulated semiconductor die, said semiconductor die package having a first surface having a first size, a second surface having a second size substantially the same as said first size of said first surface, a lead edge, a first end surface, a second end surface, and a plurality of lead pins extending along said lead edge for connecting to said substrate, said plurality of lead pins comprising gull-wing zig-zag leads; forming a thermally conductive carrier substantially conforming to a surface area of said first surface of said semiconductor die package, said thermally conductive carrier including at least two leads extending therefrom; connecting portions of the thermally conductive carrier using an interference fit with portions of said semiconductor die package, said thermally conductive carrier including a pair of insert leads extending therefrom; adhesively connecting to said first surface of said semiconductor die package providing a heat sink for said semiconductor die package, said thermally conductive carrier including said pair of insert leads extending therefrom; and mounting said thermally conductive carrier having said semiconductor die package connected thereto to said substrate by connecting said pair of insert leads to said substrate in a substantially vertically orientation by portions of said thermally conductive carrier engaging portions of said substrate at least extending thereinto.

Claim 24

A method of forming a vertical mount semiconductor device chip package assembly for substantially vertically mounting to a substrate, comprising: forming a semiconductor die package including an encapsulated semiconductor die, said semiconductor die package having a first surface having a first size, a second surface having a second size substantially the same as said first size of said first surface, a lead edge, a first end surface, a second end surface, and a plurality of lead pins extending along said lead edge for connecting to said substrate, said plurality of lead pins comprising gull-wing zig-zag leads; forming a thermally conductive carrier substantially conforming to a surface area of said first surface of said semiconductor die package, said thermally conductive carrier including at least two leads extending therefrom; connecting portions of the thermally conductive carrier using an interference fit with portions of said semiconductor die package, said thermally conductive carrier including a pair of insert leads extending therefrom; adhesively connecting to said first surface of said semiconductor die package providing a heat sink for said semiconductor die package, said thermally conductive carrier including said pair of insert leads extending therefrom; and mounting said thermally conductive carrier having said semiconductor die package connected thereto to said substrate by connecting said pair of insert leads to said substrate in a substantially vertically orientation by portions of said thermally conductive carrier engaging portions of said substrate at least extending thereinto.