US6417084B1
Expired / Lapsed
US
⏱️ 0.0 years remaining
T-gate formation using a modified conventional poly process
Assignee: GlobalFoundries US Inc
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Filing: 2000-07-20
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Granted: 2002-07-09
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Expires: 2020-07-20
Abstract
Abstract A method is provided for fabricating a T-gate structure. A structure is provided that has a silicon layer having a gate oxide layer, a polysilicon layer over the gate oxide layer, and an ARC layer over the polysilicon layer. A gate structure is formed by removing the ARC layer and a portion of the polysilicon layer around a gate region. Spacers are then formed around the gate structure. Undercut regions are formed in the gate structure by performing an isotropic etch to provide the gate structure with a base region and a contact region. The base region has a width smaller than the contact region.
Inventors
- 👤 Bhanwar Singh
- 👤 Marina Plat
- 👤 Ramkumar Subramanian
- 👤 Christopher F. Lyons
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-30 14:25
CPC Classifications
H; H10; H10D; H10D64/00; H10D64/01; H10D64/013; H10D64/01302; H10D64/01304; H10D64/01324; H10P; H10P50/00; H10P50/71
Claims Analysis
Total Claims: 22
Claim 1
Independent Claim
84 words
A method for fabricating a T-gate structure comprising the steps of: providing a silicon layer having a gate oxide layer, a polysilicon layer over the gate oxide layer; forming a gate structure by removing portions of the polysilicon layer around a gate region; and forming undercut regions in the gate structure by performing an isotropic etch on the gate structure to provide the gate structure with a base region and a contact region, the base region having a width smaller than the contact region.
Claim 2
Independent Claim
84 words
A method for fabricating a T-gate structure comprising the steps of: providing a silicon layer having a gate oxide layer, a polysilicon layer over the gate oxide layer; forming a gate structure by removing portions of the polysilicon layer around a gate region; and forming undercut regions in the gate structure by performing an isotropic etch on the gate structure to provide the gate structure with a base region and a contact region, the base region having a width smaller than the contact region.
Claim 3
Dependent Claim
23 words
The method of claim 1 , the isotropic etch removing the remaining portions of the polysilicon layer not part of the gate structure.
Claim 4
Dependent Claim
38 words
The method of claim 1 , the isotropic etch being performed by one of a reactive ion etching, standard plasma etching, magnetically enhanced reactive ion etching, reactive ion beam ion etching, microwave plasma etching and radical beam etching.
Claim 5
Dependent Claim
47 words
The method of claim 1 , the isotropic etch being performed by using a MERIE method with reactant gases of CL 2 (30-100 sccm) and HBr(30-100 sccm) at a power level within the range of about 300-700 W, and pressure within the range of about 10-250 mT.
Claim 6
Dependent Claim
37 words
The method of claim 1 , the step of providing a silicon layer having a gate oxide layer, a polysilicon layer over the gate oxide layer further comprising providing a antireflective coating layer over the polysilicon layer.
Claim 7
Dependent Claim
24 words
The method of claim 5 , the antireflective coating layer being one of silicon oxynitride (SiON), silicon rich nitride (SiN) and titanium nitride (TiN).
Claim 8
Dependent Claim
30 words
The method of claim 5 , the gate oxide layer, the polysilicon layer and the antireflective layer having a thickness within the range of about 500 Å to 3000 Å.
Claim 9
Dependent Claim
56 words
The method of claim 7 , the gate oxide layer having a thickness within the range of about 10 Å to 1000 Å, the polysilicon layer having a thickness within the range of about 200 Å to 2500 Å and the antireflective layer having a thickness within the range of about 100 Å to 1500 Å.
Claim 10
Dependent Claim
37 words
The method of claim 1 , further comprising the step of forming spacers on the sidewalls of the gate structure after the step of forming a gate structure and before the steps of forming the undercut regions.
Claim 11
Dependent Claim
41 words
The method of claim 9 , the step of forming spacers on the sidewalls of the gate structure comprising a step of providing an oxide layer on the polysilicon layer and a step of etching the layer to form the spacers.
Claim 12
Dependent Claim
21 words
The method of claim 10 , the step of etching the layer to form the spacers being a vertical plasma etch.
Claim 13
Dependent Claim
26 words
The method of claim 10 , the step of providing the oxide layer on the polysilicon layer comprising growing the oxide layer over the polysilicon layer.
Claim 14
Dependent Claim
28 words
The method of claim 1 , further comprising the step of forming spacers on the sidewalls of the gate structure after the step of forming the undercut regions.
Claim 15
Dependent Claim
42 words
The method of claim 13 , the step of forming spacers on the sidewalls of the gate structure comprising a step of providing an oxide layer on the polysilicon layer and a step of etching the oxide layer to form the spacers.
Claim 16
Dependent Claim
22 words
The method of claim 14 , the step of etching the oxide layer to form the spacers being a vertical plasma etch.
Claim 17
Dependent Claim
26 words
The method of claim 14 , the step of providing the oxide layer on the polysilicon layer comprising growing the oxide layer over the polysilicon layer.
Claim 18
Independent Claim
98 words
A method for fabricating a T-gate structure comprising the steps of: providing a silicon layer having a gate oxide layer, a polysilicon layer over the gate oxide layer and an ARC layer over the polysilicon layer; forming a gate structure by removing the ARC layer and portions of the polysilicon layer around a gate region; forming spacers around the gate structure; and performing an isotropic etch to form undercut regions in the gate structure to provide the gate structure with a base region and a contact region, the base region having a width smaller than the contact region.
Claim 19
Independent Claim
98 words
A method for fabricating a T-gate structure comprising the steps of: providing a silicon layer having a gate oxide layer, a polysilicon layer over the gate oxide layer and an ARC layer over the polysilicon layer; forming a gate structure by removing the ARC layer and portions of the polysilicon layer around a gate region; forming spacers around the gate structure; and performing an isotropic etch to form undercut regions in the gate structure to provide the gate structure with a base region and a contact region, the base region having a width smaller than the contact region.
Claim 20
Dependent Claim
47 words
The method of claim 17 , the isotropic etch being performed by using a MERIE method with reactant gases of CL 2 (30-100 sccm) and HBr(30-100 sccm) at a power level within the range of about 300-700 W, and pressure within the range of about 10-250 mT.
Claim 21
Independent Claim
153 words
A method for fabricating a T-gate structure comprising the steps of: providing a silicon layer having a gate oxide layer, a polysilicon layer over the gate oxide layer and an ARC layer over the polysilicon layer; forming a gate structure by removing the ARC layer and portions of the polysilicon layer around a gate region; forming a first pair of spacers around the gate structure; performing an isotropic etch to form undercut regions in the gate structure to provide the gate structure with a base region and a contact region, the base region having a width smaller than the contact region, the isotropic etch being performed by using a MERIE method with reactant gases of CL 2 (30-100 sccm) and HBr(30-100 sccm) at a power level within the range of about 300-700 W, and pressure within the range of about 10-250 mT; and forming a second pair of spacers around the gate structure.
Claim 22
Independent Claim
153 words
A method for fabricating a T-gate structure comprising the steps of: providing a silicon layer having a gate oxide layer, a polysilicon layer over the gate oxide layer and an ARC layer over the polysilicon layer; forming a gate structure by removing the ARC layer and portions of the polysilicon layer around a gate region; forming a first pair of spacers around the gate structure; performing an isotropic etch to form undercut regions in the gate structure to provide the gate structure with a base region and a contact region, the base region having a width smaller than the contact region, the isotropic etch being performed by using a MERIE method with reactant gases of CL 2 (30-100 sccm) and HBr(30-100 sccm) at a power level within the range of about 300-700 W, and pressure within the range of about 10-250 mT; and forming a second pair of spacers around the gate structure.
References Cited (Backward Citations)
US4980316A
Cited
US5155053A
Cited
US5677089A
Cited
US5930610A
Cited
US20010009784A1
Cited
US6077761A
Cited
US6306710B1
Cited
US6255202B1
Cited
US6270929B1
Cited
US6319802B1
Cited
US6313019B1
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2005-07-08 | 2006-01-07 | 2006-07-09 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2009-07-08 | 2010-01-07 | 2010-07-09 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2013-07-08 | 2014-01-07 | 2014-07-09 | $7700.00 | Window Closed / Lapsed |