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US6410426B1 Expired / Lapsed US ⏱️ 0.0 years remaining

Damascene cap layer process for integrated circuit interconnects

Assignee: Texas Instruments Inc
•
Filing: 2001-07-09
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Granted: 2002-06-25
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Expires: 2021-07-09
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Abstract

Abstract The invention describes a method for forming integrated circuit interconnects. A capping layer ( 50 ) is formed on a low k dielectric layer ( 40 ). The capping layer ( 50 ) and the low k dielectric layer ( 40 ) are etched to form a via and/or trench in the low k dielectric ( 4 ) which is filled with a conducting material ( 90 ) ( 95 ).

Inventors

  • 👤 Guoqiang Xing
  • 👤 Ping Jiang

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-06 08:59
CPC Classifications
H; H10; H10W; H10W20/00; H10W20/01; H10W20/071; H10W20/081; H10W20/084; H10W20/085; Y; Y10; Y10S; Y10S438/00; Y10S438/97

Claims Analysis

Total Claims: 8
Claim 1
Independent Claim 107 words
A method for forming interconnects, comprising: providing a silicon substrate containing one or more electronic devices; forming a first dielectric layer over said silicon substrate; forming a second dielectric layer over said first dielectric layer wherein the dielectric constant of the second dielectric layer is less than 3.0; forming a capping layer on said second dielectric layer wherein said capping layer consists of a material selected form the group consisting of titanium aluminide (TiAl), titanium aluminum nitride (TiAlN), titanium nitride (TiN), aluminum nitride (AlN), tantalum aluminide (TaAl), and tantalum aluminum nitride (TaAlN); forming a trench in said second dielectric; and filling said trench with a conducting material.
Claim 2
Independent Claim 107 words
A method for forming interconnects, comprising: providing a silicon substrate containing one or more electronic devices; forming a first dielectric layer over said silicon substrate; forming a second dielectric layer over said first dielectric layer wherein the dielectric constant of the second dielectric layer is less than 3.0; forming a capping layer on said second dielectric layer wherein said capping layer consists of a material selected form the group consisting of titanium aluminide (TiAl), titanium aluminum nitride (TiAlN), titanium nitride (TiN), aluminum nitride (AlN), tantalum aluminide (TaAl), and tantalum aluminum nitride (TaAlN); forming a trench in said second dielectric; and filling said trench with a conducting material.
Claim 3
Dependent Claim 12 words
The method of claim 1 wherein said second dielectric layer is OSG.
Claim 4
Dependent Claim 11 words
The method of claim 1 wherein said conducting material is copper.
Claim 5
Independent Claim 152 words
A method for forming integrated circuit interconnects, comprising: providing a silicon substrate containing one or more electronic devices; forming a first dielectric layer over said silicon substrate; forming a second dielectric layer over said etch stop layer wherein the dielectric constant of the second dielectric layer is less than 3.0; forming a capping layer on said second dielectric layer wherein said capping layer consists of a material selected form the group consisting of titanium aluminide (TiAl), titanium aluminum nitride (TiAlN), titanium nitride (TiN), aluminum nitride (AlN), tantalum aluminide (TaAl), and tantalum aluminum nitride (TaAlN); forming a first trench in said second dielectric wherein said first trench has a first width; forming a second trench in said second dielectric wherein said second trench has a second width different from said first width and said second trench is positioned over said first trench; and filling said first and second trench with a conducting material.
Claim 6
Independent Claim 152 words
A method for forming integrated circuit interconnects, comprising: providing a silicon substrate containing one or more electronic devices; forming a first dielectric layer over said silicon substrate; forming a second dielectric layer over said etch stop layer wherein the dielectric constant of the second dielectric layer is less than 3.0; forming a capping layer on said second dielectric layer wherein said capping layer consists of a material selected form the group consisting of titanium aluminide (TiAl), titanium aluminum nitride (TiAlN), titanium nitride (TiN), aluminum nitride (AlN), tantalum aluminide (TaAl), and tantalum aluminum nitride (TaAlN); forming a first trench in said second dielectric wherein said first trench has a first width; forming a second trench in said second dielectric wherein said second trench has a second width different from said first width and said second trench is positioned over said first trench; and filling said first and second trench with a conducting material.
Claim 7
Dependent Claim 12 words
The method of claim 4 wherein said second dielectric layer is OSG.
Claim 8
Dependent Claim 11 words
The method of claim 4 wherein said conducting material is copper.

References Cited (Backward Citations)

US6303523B2 Cited
US6340435B1 Cited
US6245690B1 Cited
US6326301B1 Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 2005-06-24 2005-12-24 2006-06-25 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2009-06-24 2009-12-24 2010-06-25 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2013-06-24 2013-12-24 2014-06-25 $7700.00 Window Closed / Lapsed

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