US6344405B1
Expired / Lapsed
US
⏱️ 0.0 years remaining
Transistors having optimized source-drain structures and methods for making the same
Assignee: III Holdings 6 LLC
•
Filing: 2000-04-11
•
Granted: 2002-02-05
•
Expires: 2020-04-11
Abstract
Abstract A transistor structure having dimensions below about 100 nm is provided. The transistor structure comprises a substrate with a first polarity. The substrate includes a shallow halo implant having the first polarity defined at a first depth within the substrate. The substrate also has a deep halo implant which is the same polarity as the substrate and is defined to a second depth deeper than the first depth of the shallow halo implant. The shallow halo implant and the deep halo implant allow a peak concentration of substrate impurities at a level below the gate such that the resistance of the transistor is minimized along with the threshold voltage, short channel effects and leakage current in the transistor.
Inventors
- 👤 Samar K. Saha
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-05 11:25
CPC Classifications
H; H10; H10D; H10D30/00; H10D30/01; H10D30/021; H10D30/0223; H10D30/0227; H10D30/60; H10D30/601; H10D62/00; H10D62/10; H10D62/17; H10D62/351; H10D62/357; H10D62/364; H10D62/371; H10D64/00; H10D64/01; H10D64/021; H10P; H10P30/00; H10P30/20; H10P30/222
Claims Analysis
Total Claims: 29
Claim 1
Independent Claim
68 words
A method for forming transistor source/drain regions in a substrate having a first polarity, comprising: implanting a shallow halo region being of the first polarity and having a first concentration; and implanting a deep halo region being of the first polarity and having a second concentration that is lower than the first concentration, the deep halo region being defined deeper into the substrate than the shallow halo region.
Claim 2
Independent Claim
68 words
A method for forming transistor source/drain regions in a substrate having a first polarity, comprising: implanting a shallow halo region being of the first polarity and having a first concentration; and implanting a deep halo region being of the first polarity and having a second concentration that is lower than the first concentration, the deep halo region being defined deeper into the substrate than the shallow halo region.
Claim 3
Dependent Claim
64 words
A method for forming transistor source/drain regions in a substrate having a first polarity as recited in claim 1 , further comprising: implanting a source-drain extension region into the substrate just above the shallow halo region, the shallow halo region being configured to assist in suppressing short channel effects, and the source-drain extension being of a second polarity that is opposite the first polarity.
Claim 4
Dependent Claim
78 words
A method for forming transistor source/drain regions in a substrate having a first polarity as recited in claim 2 , further comprising: implanting a deep source-drain region into the substrate to a depth that is about equal to a depth of the deep halo region, the deep halo region being configured to reduce deep leakage currents not controllable by a gate voltage potential, the deep source-drain region being of the second polarity that is opposite the first polarity.
Claim 5
Dependent Claim
35 words
A method for forming transistor source/drain regions in a substrate having a first polarity as recited in claim 3 , further comprising: forming a first transistor spacer before the implanting of the deep halo region.
Claim 6
Dependent Claim
46 words
A method for forming transistor source/drain regions in a substrate having a first polarity as recited in claim 3 , wherein the implant of the deep source-drain region implements an implant concentration ranging between about 1×10 20 atoms/cm 3 to about 5×10 20 atoms/cm 3 .
Claim 7
Dependent Claim
41 words
A method for forming transistor source/drain regions in a substrate having a first polarity as recited in claim 4 , further comprising: forming a second transistor spacer over the first transistor spacer before implanting the deep source-drain region into the substrate.
Claim 8
Dependent Claim
47 words
A method for forming transistor source/drain regions in a substrate having a first polarity as recited in claim 2 , wherein the implant of the source drain extension region implements an implant concentration ranging between about 1×10 20 atoms/cm 3 and about 5×10 20 atoms/cm 3 .
Claim 9
Dependent Claim
46 words
A method for forming transistor source/drain regions in a substrate having a first polarity as recited in claim 3 , wherein a channel defined below a transistor gate separates the source/drain regions, the transistor gate having a gate length that is less than about 100 nm.
Claim 10
Dependent Claim
44 words
A method for forming transistor source/drain regions in a substrate having a first polarity as recited in claim 1 , wherein the first concentration of the implanted shallow halo region ranges between about 1×10 18 atoms/cm 3 and about 1×10 19 atoms/cm 3 .
Claim 11
Dependent Claim
44 words
A method for forming transistor source/drain regions in a substrate having a first polarity as recited in claim 1 , wherein the second concentration of the implanted deep halo region ranges between about 1×10 18 atoms/cm 3 and about 5×10 18 atoms/cm 3 .
Claim 12
Dependent Claim
79 words
A transistor structure, comprising: a substrate being of a first polarity, the substrate including, a shallow halo implant being of the first polarity and defined at a first depth within the substrate; and a deep halo implant being of the first polarity and being defined to a second depth that is greater than the first depth of the shallow halo implant, the deep halo implant having a lower impurity concentration than an impurity concentration of the shallow halo implant.
Claim 13
Dependent Claim
79 words
A transistor structure, comprising: a substrate being of a first polarity, the substrate including, a shallow halo implant being of the first polarity and defined at a first depth within the substrate; and a deep halo implant being of the first polarity and being defined to a second depth that is greater than the first depth of the shallow halo implant, the deep halo implant having a lower impurity concentration than an impurity concentration of the shallow halo implant.
Claim 14
Dependent Claim
39 words
A transistor structure as recited in claim 11 , wherein the shallow halo implant has a higher impurity concentration than the substrate and the deep halo implant, and deep halo implant has a higher impurity concentration than the substrate.
Claim 15
Dependent Claim
23 words
A transistor structure as recited in claim 11 , wherein the shallow halo implant is configured to assist in suppressing short channel effects.
Claim 16
Dependent Claim
20 words
A transistor structure as recited in claim 11 , wherein the deep halo implant is configured to reduce leakage currents.
Claim 17
Dependent Claim
38 words
A transistor structure as recited in claim 11 , further comprising: source-drain extensions being of a second polarity that is opposite the first polarity and being defined in the substrate above and adjacent to the shallow halo implants.
Claim 18
Dependent Claim
36 words
A transistor structure as recited in claim 11 , further comprising: deep source-drains being of a second polarity that is opposite the first polarity and being defined in the substrate down to the deep halo implants.
Claim 19
Dependent Claim
38 words
A transistor structure as recited in claim 11 , wherein the transistor structure includes a gate electrode, the gate electrode having spacers used to space apart the deep halo implants from a channel region of the transistor structure.
Claim 20
Dependent Claim
27 words
A transistor structure as recited in claim 17 , wherein the gate electrode has a gate length that is less than or equal to about 100 nm.
Claim 21
Dependent Claim
31 words
A transistor structure as recited in claim 11 , wherein the shallow halo implant has a concentration ranging between about 1×10 18 atoms/cm 3 and about 1×10 19 atoms/cm 3 .
Claim 22
Dependent Claim
31 words
A transistor structure as recited in claim 11 , wherein the deep halo implants have a concentration ranging between about 1×10 18 atoms/cm 3 and about 5×10 18 atoms/cm 3 .
Claim 23
Dependent Claim
70 words
A transistor having source/drain regions in a substrate, each source/drain region comprising: an extension implant region; a shallow halo implant region defined below the extension implant region; a deep halo implant region defined below the shallow halo implant region, the deep halo implant having a lower impurity concentration than an impurity concentration of the shallow halo implant; and a deep implant region defined down to the deep halo implant region.
Claim 24
Dependent Claim
70 words
A transistor having source/drain regions in a substrate, each source/drain region comprising: an extension implant region; a shallow halo implant region defined below the extension implant region; a deep halo implant region defined below the shallow halo implant region, the deep halo implant having a lower impurity concentration than an impurity concentration of the shallow halo implant; and a deep implant region defined down to the deep halo implant region.
Claim 25
Dependent Claim
40 words
A transistor having source/drain regions in a substrate as recited in claim 21 , wherein the substrate is of a first polarity and the shallow halo implant region and the deep halo implant region are also of the fist polarity.
Claim 26
Dependent Claim
30 words
A transistor having source/drain regions in a substrate as recited in claim 22 , wherein the extension implant region and the deep implant region define each of the source/drain regions.
Claim 27
Dependent Claim
29 words
A transistor having source/drain regions in a substrate as recited in claim 22 , wherein the shallow halo implant region is at a first depth in the source/drain region.
Claim 28
Dependent Claim
33 words
A transistor having source/drain regions in a substrate as recited in claim 24 , wherein the deep halo implant region is at a depth lower than the first depth in the source/drain regions.
Claim 29
Dependent Claim
27 words
A transistor having source/drain regions in a substrate as recited in claim 24 , wherein the extension implant region is at a depth above the first depth.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2005-02-04 | 2005-08-06 | 2006-02-05 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2009-02-04 | 2009-08-06 | 2010-02-05 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2013-02-04 | 2013-08-06 | 2014-02-05 | $7700.00 | Window Closed / Lapsed |