Patent US6342726B2 successfully refreshed from Google Patents.
US6342726B2
Expired / Lapsed
US
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Semiconductor device and manufacturing method thereof
Assignee: Renesas Electronics Corp
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Filing: 1999-11-26
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Granted: 2002-01-29
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Expires: 2019-11-26
Abstract
Abstract A ball grid array type semiconductor package includes a semiconductor chip formed with bonding pads, an elastomer bonded to the semiconductor chip, a flexible wiring substrate bonded to the elastomer and formed with wirings connected at one end of the bonding pads of the semiconductor chip, a solder resist formed on the main surface of the flexible wiring substrate and solder bump electrodes connected to the other ends of the wirings. The elastomer is bonded to the flexible wiring substrate on the side of the tape, the solder resist is formed on the side of the wirings, and the solder bump electrodes are connected with the wirings by way of through holes formed in the solder resist.
Inventors
- 👤 Chuichi Miyazaki
- 👤 Yukiharu Akiyama
- 👤 Masanori Shibamoto
- 👤 Tomoaki Kudaishi
- 👤 Ichiro Anjoh
- 👤 Kunihiko Nishi
- 👤 Asao Nishimura
- 👤 Hideki Tanaka
- 👤 Ryosuke Kimoto
- 👤 Kunihiro Tsubosaki
- 👤 Akio Hasebe
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-09 21:22
CPC Classifications
H; H10; H10W; H10W90/00; H10W90/701; H10W74/00; H10W70/00; H10W70/60; H10W70/62; H10W70/63; H10W70/635; H10W70/67; H10W70/688; H10W72/00; H10W72/01; H10W72/015; H10W72/01551; H10W72/071; H10W72/075; H10W72/077; H10W72/20; H10W72/29; H10W72/50; H10W72/531; H10W72/536; H10W72/5363; H10W72/551; H10W72/552; H10W72/5522; H10W72/5524; H10W72/59; H10W72/701; H10W72/851; H10W72/853; H10W72/865; H10W72/90; H10W72/931; H10W72/932; H10W72/941; H10W72/944; H10W72/9445; Y; Y10; Y10T; Y10T29/00; Y10T29/49; Y10T29/49002; Y10T29/49117; Y10T29/49124; Y10T29/4913; Y10T29/49169
Claims Analysis
Total Claims: 11
Claim 1
Independent Claim
168 words
a semiconductor device comprising: a wiring substrate comprising an insulating substrate base, a bump land formed on a first surface of the insulating substrate base, a wiring electrically connected to the bump land formed on the first surface of the insulating substrate base, a penetrating hole formed in the insulating substrate base on the bump land, and a bump electrode formed on the bump land through the penetrating hole, a semiconductor chip comprising a semiconductor element and an external terminal formed on a main surface of the semiconductor chip; an elastic film formed between the first surface of the insulating substrate base and the main surface of the semiconductor chip; an opening in the wiring substrate formed over the external terminal; and a lead electrically connecting the wiring at the edge of the opening with the external terminal, wherein the elastic film is recessed from the edge of the opening, at a portion where the lead connects to the wiring, towards a direction away from the external terminal.
Claim 2
Dependent Claim
168 words
a semiconductor device comprising: a wiring substrate comprising an insulating substrate base, a bump land formed on a first surface of the insulating substrate base, a wiring electrically connected to the bump land formed on the first surface of the insulating substrate base, a penetrating hole formed in the insulating substrate base on the bump land, and a bump electrode formed on the bump land through the penetrating hole, a semiconductor chip comprising a semiconductor element and an external terminal formed on a main surface of the semiconductor chip; an elastic film formed between the first surface of the insulating substrate base and the main surface of the semiconductor chip; an opening in the wiring substrate formed over the external terminal; and a lead electrically connecting the wiring at the edge of the opening with the external terminal, wherein the elastic film is recessed from the edge of the opening, at a portion where the lead connects to the wiring, towards a direction away from the external terminal.
Claim 3
Dependent Claim
24 words
A semiconductor device according to claim 1 , wherein the bump land, the wiring and the lead are included in a common conductive film.
Claim 4
Dependent Claim
16 words
A semiconductor device according to claim 2 , wherein the conductive film comprises a copper core.
Claim 5
Dependent Claim
14 words
A semiconductor device according to claim 2 , wherein the conductive film comprises copper.
Claim 6
Dependent Claim
166 words
A semiconductor device comprising: a wiring substrate comprising an insulating substrate base, bump lands formed on a first surface of the insulating substrate base, wirings electrically connected to the bump lands formed on the first surface of the insulating substrate base, penetrating holes formed in the insulating substrate base on the respective bump lands, and bump electrodes formed on the respective bump lands through the respective penetrating holes; a semiconductor chip comprising semiconductor elements and external terminals formed on a main surface of the semiconductor chip; an elastic film formed between the first surface of the insulating substrate base and the main surface of the semiconductor chip; an opening in the wiring substrate formed over the external terminals; and leads electrically connecting the respective wirings at the edge of the opening with the respective external terminals, wherein the elastic film is recessed from the edge of the opening, at all portions where the leads connect to the wirings, towards a direction away from the external terminals.
Claim 7
Dependent Claim
166 words
A semiconductor device comprising: a wiring substrate comprising an insulating substrate base, bump lands formed on a first surface of the insulating substrate base, wirings electrically connected to the bump lands formed on the first surface of the insulating substrate base, penetrating holes formed in the insulating substrate base on the respective bump lands, and bump electrodes formed on the respective bump lands through the respective penetrating holes; a semiconductor chip comprising semiconductor elements and external terminals formed on a main surface of the semiconductor chip; an elastic film formed between the first surface of the insulating substrate base and the main surface of the semiconductor chip; an opening in the wiring substrate formed over the external terminals; and leads electrically connecting the respective wirings at the edge of the opening with the respective external terminals, wherein the elastic film is recessed from the edge of the opening, at all portions where the leads connect to the wirings, towards a direction away from the external terminals.
Claim 8
Dependent Claim
15 words
A semiconductor device according to claim 5 , wherein the bump electrodes comprise solder bumps.
Claim 9
Dependent Claim
18 words
A semiconductor device according to claim 6 , wherein the insulating substrate base comprises a polyimide resin film.
Claim 10
Dependent Claim
18 words
A semiconductor device according to claim 5 , wherein the insulating substrate base comprises a polyimide resin film.
Claim 11
Dependent Claim
23 words
A semiconductor device according to claim 5 , wherein said external terminals are arrayed centrally over the main surface of the semiconductor chip.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2005-01-28 | 2005-07-30 | 2006-01-29 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2009-01-28 | 2009-07-30 | 2010-01-29 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2013-01-28 | 2013-07-30 | 2014-01-29 | $7700.00 | Window Closed / Lapsed |