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US6337579B1 Expired / Lapsed US ⏱️ 0.0 years remaining

Multichip semiconductor device

Assignee: ACHLYS TECHNOLOGIES INC.
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Filing: 2000-03-02
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Granted: 2002-01-08
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Expires: 2020-03-02
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Abstract

Abstract A multichip semiconductor device has a first semiconductor chip and a second semiconductor chip superposed on and bonded to each other so as to form a chip-on-chip structure. The first semiconductor chip has a field-programmable gate array circuit and a switch circuit formed thereon. The second semiconductor chip has a non-volatile configuration memory circuit formed thereon for storing the setting information about how to set the circuit of the field-programmable gate array circuit.

Inventors

  • 👤 Hiroo Mochida

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-09 20:28
CPC Classifications
H; H10; H10W; H10W90/00; H10W72/00; H10W72/90; H10W72/941; H10W72/9415; H10W72/951; H10W72/952; H10W90/701; H10W90/721; H10W90/722; H10W90/751; H10W90/756

Claims Analysis

Total Claims: 3
Claim 1
Independent Claim 246 words
A multichip semiconductor device, comprising: a first semiconductor chip having a field-programmable gate array circuit portion; a second semiconductor chip having a programmable non-volatile memory for storing setting information about how to set a circuit of the field-programmable gate array circuit portion; an external connection terminal formed on the first semiconductor chip; a switch circuit formed on the first semiconductor chip and connected to the external connection terminal; an input/output line for connecting the switch circuit and the field-programmable gate array circuit portion to each other; a first connecting member for connecting the field-programmable gate array circuit portion and the non-volatile memory to each other; a second connecting member for connecting the switch circuit and the non-volatile memory to each other; and a setting information protecting mechanism for switching the switch circuit to the second state so as to disconnect the external connection terminal from the non-volatile memory permanently after the setting information has been stored in the non-volatile memory by being fed thereto from the external connection terminal through the switch circuit and the second connecting member, wherein the switch circuit can be switched between a first state connected to the second connecting member and a second state connected to the field-programmable gate array circuit portion, and the setting information about how to set the circuit of the field-programmable gate array circuit portion is written to the non-volatile memory by way of the second connecting member when the switch circuit is in the first state.
Claim 2
Dependent Claim 246 words
A multichip semiconductor device, comprising: a first semiconductor chip having a field-programmable gate array circuit portion; a second semiconductor chip having a programmable non-volatile memory for storing setting information about how to set a circuit of the field-programmable gate array circuit portion; an external connection terminal formed on the first semiconductor chip; a switch circuit formed on the first semiconductor chip and connected to the external connection terminal; an input/output line for connecting the switch circuit and the field-programmable gate array circuit portion to each other; a first connecting member for connecting the field-programmable gate array circuit portion and the non-volatile memory to each other; a second connecting member for connecting the switch circuit and the non-volatile memory to each other; and a setting information protecting mechanism for switching the switch circuit to the second state so as to disconnect the external connection terminal from the non-volatile memory permanently after the setting information has been stored in the non-volatile memory by being fed thereto from the external connection terminal through the switch circuit and the second connecting member, wherein the switch circuit can be switched between a first state connected to the second connecting member and a second state connected to the field-programmable gate array circuit portion, and the setting information about how to set the circuit of the field-programmable gate array circuit portion is written to the non-volatile memory by way of the second connecting member when the switch circuit is in the first state.
Claim 3
Dependent Claim 48 words
A multichip semiconductor device as claimed in claim 1 , wherein the first and second semiconductor chips are bonded together by superposing the second semiconductor chip on and bonding it to a surface of the first semiconductor chip so as to form a chip-on-chip structure as a whole.

References Cited (Backward Citations)

US4697095A Cited
JPH0513663A Cited
JPH05167004A Cited
US5440423A Cited
US5640107A Cited
US5801547A Cited
US6049222A Cited
US5977640A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 2005-01-07 2005-07-09 2006-01-08 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2009-01-07 2009-07-09 2010-01-08 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2013-01-07 2013-07-09 2014-01-08 $7700.00 Window Closed / Lapsed

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