Integrated structure with an analog unit supplied by an external supply voltage by means of a low-pass filter and driving elements

Claim 2

A circuit comprising: an integrated structure including a first external supply terminal and a second external supply terminal for applying an external supply voltage, an analog unit supplied by at least one internal supply voltage derived from the external supply voltage, a low-pass filter connected to the first external supply terminal and to the second external supply terminal, and comprising a first capacitive element, a control terminal connected to the first capacitive element of the low pass filter, and a driving circuit connected between the low-pass filter and the analog unit for supplying the at least one internal supply voltage, the driving circuit comprising at least one filtering capacitive element for filtering the at least one internal supply voltage; and an external capacitive element external to the integrated structure and connected to the control terminal, the external capacitive element having a higher capacitance than a capacitance of the first capacitive element of the low pass filter.

Claim 3

A circuit according to claim 1 , wherein the analog unit is a differential type analog unit; wherein the at least one internal supply voltage comprises a first internal supply voltage and a second internal supply voltage; wherein the low-pass filter includes a first resistive element connected to the first external supply terminal, and a second resistive element connected to the second external supply terminal, with the first capacitive element connected between the first resistive element and the second resistive element; and wherein the driving circuit comprises a first driving element and a second driving element, each connected between the first capacitive element and the analog unit, for supplying the first internal supply voltage and the second internal supply voltage, respectively.

Claim 4

A circuit according to claim 2 , wherein the first and second resistive elements comprise a first MOS transistor and a second MOS transistor, respectively, each of the first and second MOS transistors being connected to the first and second external supply terminals, and to the first capacitive element.

Claim 5

A circuit according to claim 2 , wherein the analog unit includes a first internal supply terminal and a second internal supply terminal to which the first and second internal supply voltages are applied, respectively; and wherein each of the first and second driving elements includes a MOS transistor connected to one of the first and second external supply terminals, to the first capacitive element, and to one of the first and second internal supply terminals.

Claim 6

A circuit according to claim 4 , wherein the at least one filtering capacitive element includes two filtering capacitive elements, wherein each of the first and second driving elements includes one of the two filtering capacitive elements, the filtering capacitive element of the first driving element being connected between the first internal supply terminal and the second internal supply terminal, and the filtering capacitive element of the second driving element being connected between the second internal supply terminal and the first external supply terminal.

Claim 7

A circuit according to claim 5 , wherein each filtering capacitive element has a capacitance substantially lower than a capacitance of the first capacitive element.

Claim 8

A circuit according to claim 1 , wherein the analog unit is a voltage-controlled oscillator.

Claim 9

A circuit according to claim 7 , further comprising: a digital unit supplied by the external supply voltage; and a phase-locked loop defined by the voltage-controlled oscillator for generating an internal clock signal for the digital unit based upon an external clock signal.

Claim 10

A circuit comprising: an integrated structure including a first external supply terminal and a second external supply terminal for applying an external supply voltage, a low-pass filter connected to the first external supply terminal and to the second external supply terminal, and comprising a first capacitive element, a control terminal connected to the first capacitive element of the low pass filter, a driving circuit connected to the low-pass filter for generating at least one internal supply voltage based upon the external supply voltage, the driving circuit comprising at least one filtering capacitive element for filtering the at least one internal supply voltage, and an analog unit connected to the driving circuit and receiving the at least one internal supply voltage; and an external capacitive element external to the integrated structure and connected to the control terminal, the external capacitive element having a higher capacitance than a capacitance of the first capacitive element of the low pass filter.

Claim 11

A circuit comprising: an integrated structure including a first external supply terminal and a second external supply terminal for applying an external supply voltage, a low-pass filter connected to the first external supply terminal and to the second external supply terminal, and comprising a first capacitive element, a control terminal connected to the first capacitive element of the low pass filter, a driving circuit connected to the low-pass filter for generating at least one internal supply voltage based upon the external supply voltage, the driving circuit comprising at least one filtering capacitive element for filtering the at least one internal supply voltage, and an analog unit connected to the driving circuit and receiving the at least one internal supply voltage; and an external capacitive element external to the integrated structure and connected to the control terminal, the external capacitive element having a higher capacitance than a capacitance of the first capacitive element of the low pass filter.

Claim 12

A circuit according to claim 9 , wherein the analog unit is a differential type analog unit; wherein the at least one internal supply voltage comprises a first internal supply voltage and a second internal supply voltage; wherein the low-pass filter includes a first resistive element connected to the first external supply terminal, and a second resistive element connected to the second external supply terminal, with the first capacitive element connected between the first resistive element and the second resistive element; and wherein the driving circuit comprises a first driving element and a second driving element, each connected between the first capacitive element and the analog unit, for supplying the first internal supply voltage and the second internal supply voltage, respectively.

Claim 13

A circuit according to claim 10 , wherein the first and second resistive elements comprise a first MOS transistor and a second MOS transistor, respectively, each of the first and second MOS transistors being connected to the first and second external supply terminals, and to the first capacitive element.

Claim 14

A circuit according to claim 10 , wherein the analog unit includes a first internal supply terminal and a second internal supply terminal to which the first and second internal supply voltages are applied, respectively; and wherein each of the first and second driving elements includes a MOS transistor connected to one of the first and second external supply terminals, to the first capacitive element, and to one of the first and second internal supply terminals.

Claim 15

A circuit according to claim 12 , wherein the at least one filtering capacitive element includes two filtering capacitive elements, wherein each of the first and second driving elements includes one of the two filtering capacitive elements, the filtering capacitive element of the first driving element being connected between the first internal supply terminal and the second internal supply terminal, and the filtering capacitive element of the second driving element being connected between the second internal supply terminal and the first external supply terminal.

Claim 16

A circuit according to claim 13 , wherein each filtering capacitive element has a capacitance substantially lower than a capacitance of the first capacitive element.

Claim 17

A circuit comprising: an integrated structure including a first external supply terminal and a second external supply terminal for applying an external supply voltage, a low-pass filter connected to the first external supply terminal and to the second external supply terminal, and comprising a first capacitive element, a control terminal connected to the first capacitive element of the low pass filter, a driving circuit connected to the low-pass filter for generating at least one internal supply voltage based upon the external supply voltage, the driving circuit comprising at least one filtering capacitive element for filtering the at least one internal supply voltage, a digital unit supplied by the external supply voltage, and a phase-locked loop comprising a voltage-controlled oscillator connected to the driving circuit and receiving the at least one internal supply voltage for generating an internal clock signal for the digital unit based upon an external clock signal; and an external capacitive element external to the integrated structure and connected to the control terminal, the external capacitive element having a higher capacitance than a capacitance of the first capacitive element of the low pass filter.

Claim 18

A circuit comprising: an integrated structure including a first external supply terminal and a second external supply terminal for applying an external supply voltage, a low-pass filter connected to the first external supply terminal and to the second external supply terminal, and comprising a first capacitive element, a control terminal connected to the first capacitive element of the low pass filter, a driving circuit connected to the low-pass filter for generating at least one internal supply voltage based upon the external supply voltage, the driving circuit comprising at least one filtering capacitive element for filtering the at least one internal supply voltage, a digital unit supplied by the external supply voltage, and a phase-locked loop comprising a voltage-controlled oscillator connected to the driving circuit and receiving the at least one internal supply voltage for generating an internal clock signal for the digital unit based upon an external clock signal; and an external capacitive element external to the integrated structure and connected to the control terminal, the external capacitive element having a higher capacitance than a capacitance of the first capacitive element of the low pass filter.

Claim 19

A circuit according to claim 15 , wherein the at least one internal supply voltage comprises a first internal supply voltage and a second internal supply voltage; wherein the low-pass filter includes a first resistive element connected to the first external supply terminal, and a second resistive element connected to the second external supply terminal, with the first capacitive element connected between the first resistive element and the second resistive element; and wherein the driving circuit comprises a first driving element and a second driving element, each connected between the first capacitive element and the phase locked loop, for supplying the first internal supply voltage and the second internal supply voltage, respectively.

Claim 20

A circuit according to claim 16 , wherein the first and second resistive elements comprise a first MOS transistor and a second MOS transistor, respectively, each of the first and second MOS transistors being connected to the first and second external supply terminals, and to the first capacitive element.

Claim 21

A circuit according to claim 16 , wherein the phase-locked loop includes a first internal supply terminal and a second internal supply terminal to which the first and second internal supply voltages are applied, respectively; and wherein each of the first and second driving elements includes a MOS transistor connected to one of the first and second external supply terminals, to the first capacitive element, and to one of the first and second internal supply terminals.

Claim 22

A circuit according to claim 18 , wherein the at least one filtering capacitive element includes two filtering capacitive elements, wherein each of the first and second driving elements includes one of the two filtering capacitive elements, the filtering capacitive element of the first driving element being connected between the first internal supply terminal and the second internal supply terminal, and the filtering capacitive element of the second driving element being connected between the second internal supply terminal and the first external supply terminal.

Claim 23

A circuit according to claim 19 , wherein each filtering capacitive element has a capacitance substantially lower than a capacitance of the first capacitive element.

Claim 26

A method according to claim 21 , wherein the analog unit is a differential type analog unit; wherein the at least one internal supply voltage comprises a first internal supply voltage and a second internal supply voltage; wherein the low-pass filter includes a first resistive element, and a second resistive element, with the first capacitive element connected between the first resistive element and the second resistive element; and wherein the driving circuit comprises a first driving element and a second driving element, each connected between the first capacitive element and the analog unit, for supplying the first internal supply voltage and the second internal supply voltage, respectively.

Claim 27

A method according to claim 22 , wherein the first and second resistive elements comprise a first MOS transistor and a second MOS transistor, respectively.

Claim 28

A method according to claim 22 , wherein the analog unit includes a first internal supply terminal and a second internal supply terminal to which the first and second internal supply voltages are applied, respectively; and wherein each of the first and second driving elements includes a MOS transistor.

Claim 29

A method according to claim 24 , wherein the at least one filtering capacitive element includes two filtering capacitive elements, and wherein each of the first and second driving elements includes one of the two filtering capacitive elements.

Claim 30

A method according to claim 25 , wherein each filtering capacitive element has a capacitance substantially lower than a capacitance of the first capacitive element.

Claim 31

A method according to claim 22 , wherein the analog unit is a voltage-controlled oscillator.

Claim 32

A method according to claim 27 , wherein the integrated circuit further comprises: a digital unit supplied by the external supply voltage; and a phase-locked loop defined by the voltage-controlled oscillator for generating an internal clock signal for the digital unit based upon an external clock signal.