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US6300837B1 Expired / Lapsed US ⏱️ 0.0 years remaining

Dynamic bias boosting circuit for a power amplifier

Assignee: NXP BV
•
Filing: 2000-03-28
•
Granted: 2001-10-09
•
Expires: 2020-03-28
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Abstract

Abstract A power amplifier circuit includes an amplifying transistor and a dc bias circuit for biasing the amplifier transistor to obtain a conduction angle of at least about 180°. The dc bias circuit includes a dynamic bias boosting circuit for increasing the dc bias current provided to the amplifying transistor by the dc bias circuit in direct proportion to an increase in the input signal provided to the power amplifier. The bias boosting circuit permits the power amplifier circuits to operate in Class B or Class AB with improved power output characteristics and reduced power dissipation at low power levels.

Inventors

  • 👤 Tirdad Sowlati
  • 👤 Sifen Luo

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-09 12:44
CPC Classifications
H; H03; H03F; H03F1/00; H03F1/02; H03F1/0205; H03F1/0261; H03F3/00; H03F3/20; H03F3/21

Claims Analysis

Total Claims: 6
Claim 1
Independent Claim 85 words
A power amplifier circuit for amplifying an input signal and having a conduction angle of at least about 180°, said power amplifier circuit comprising an amplifying transistor and a dc bias circuit for biasing said amplifying transistor to obtain said conduction angle, and said dc bias circuit comprising a dynamic bias boosting circuit for increasing a dc bias current provided to said amplifying transistor by said dc bias circuit in direct proportion to an increase in said input signal provided to said power amplifier circuit.
Claim 2
Dependent Claim 85 words
A power amplifier circuit for amplifying an input signal and having a conduction angle of at least about 180°, said power amplifier circuit comprising an amplifying transistor and a dc bias circuit for biasing said amplifying transistor to obtain said conduction angle, and said dc bias circuit comprising a dynamic bias boosting circuit for increasing a dc bias current provided to said amplifying transistor by said dc bias circuit in direct proportion to an increase in said input signal provided to said power amplifier circuit.
Claim 3
Dependent Claim 19 words
A power amplifier circuit as in claim 1 , wherein said amplifier circuit is a Class B amplifier circuit.
Claim 4
Dependent Claim 19 words
A power amplifier circuit as in claim 1 , wherein said amplifier circuit is a Class AB amplifier circuit.
Claim 5
Dependent Claim 33 words
A power amplifier circuit as in claim 1 , wherein said dynamic bias boosting circuit comprises a voltage-controlled current source controlled by a dc voltage proportional to an amplitude of said input signal.
Claim 6
Dependent Claim 60 words
A power amplifier circuit as claimed in claim 1 , further comprising a driver transistor, wherein said dynamic bias boosting circuit comprises means for sensing a voltage proportional to a current in said driver transistor and for increasing said dc bias current provided to said amplifying transistor in direct proportion to an increase in the current in said driver transistor.

References Cited (Backward Citations)

US3855540A Cited
US4638260A Cited
US4663599A Cited
US5548248A Cited
US6147543A Cited
US5844443A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 2004-10-08 2005-04-09 2005-10-09 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2008-10-08 2009-04-09 2009-10-09 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2012-10-08 2013-04-09 2013-10-09 $7700.00 Window Closed / Lapsed

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