Patent US6300203B1 successfully refreshed from Google Patents.
US6300203B1
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Electrolytic deposition of dielectric precursor materials for use in in-laid gate MOS transistors
Assignee: GlobalFoundries US Inc
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Filing: 2000-10-05
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Granted: 2001-10-09
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Expires: 2020-10-05
Abstract
Abstract High quality dielectric layers, e.g., high-k dielectric layers comprised of at least one refractory or lanthanum series transition metal oxide or silicate, for use as gate insulator layers in in-laid metal gate MOS transistors and CMOS devices, are formed by electrolytically plating a metal or metal-based dielectric precursor layer comprising at least one refractory or lanthanum series transition metal, on a semiconductor substrate, typically a silicon-based substrate, and then reacting the precursor layer with oxygen or with oxygen and the semiconductor substrate to form the at least one refractory or lanthanum series transition metal oxide or silicate. The inventive methodology prevents, or at least substantially reduces, oxygen access to the substrate surface during at least the initial stage(s) of formation of the gate insulator layer, thereby minimizing deleterious formation of oxygen-induced surface states at the semiconductor substrate/gate insulator interface.
Inventors
- 👤 Matthew S. Buynoski
- 👤 Paul R. Besser
- 👤 Qi Xang
- 👤 Paul L. King
- 👤 Eric N. Paton
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-09 01:40
CPC Classifications
H; H10; H10D; H10D64/00; H10D64/01; H10D64/013; H10D64/01302; H10D64/01332; H10D64/01336; H10D64/01342; H10D30/00; H10D30/01; H10D30/021; H10D30/0223; H10D30/0225; H10D64/60; H10D64/66; H10D64/68; H10D64/691; H10P; H10P14/00; H10P14/60; H10P14/63; H10P14/6302; H10P14/6304; H10P14/6314; H10P14/6324
Claims Analysis
Total Claims: 17
Claim 1
Independent Claim
202 words
A method of forming a semiconductor device comprising at least one MOS transistor, comprising the steps of: (a) providing a semiconductor substrate including at least a region of a first conductivity type and having a surface; (b) forming in said region of first conductivity type a pair of spaced-apart source and drain regions of a second, opposite conductivity type, said pair of spaced-apart source and drain regions extending to said substrate surface and including a pair of opposed, facing edges with a space therebetween; (c) forming a blanket layer of an insulative material extending over said substrate; (d) exposing a portion of said substrate surface including said pair of facing edges of said pair of spaced-apart source and drain regions and said space therebetween; (e) forming a layer of a gate insulator precursor material on said exposed portion of said substrate surface by electrolytic deposition; (f) converting said layer of electrolytically-deposited gate insulator precursor material into a layer of a gate insulator material; and (g) forming an electrically conductive gate electrode material in contact with said layer of gate insulator material; wherein said steps are performed according to a first sequence (a), (c)-(d), (b), (e)-(g) or according to a second sequence (a)-(g).
Claim 2
Independent Claim
202 words
A method of forming a semiconductor device comprising at least one MOS transistor, comprising the steps of: (a) providing a semiconductor substrate including at least a region of a first conductivity type and having a surface; (b) forming in said region of first conductivity type a pair of spaced-apart source and drain regions of a second, opposite conductivity type, said pair of spaced-apart source and drain regions extending to said substrate surface and including a pair of opposed, facing edges with a space therebetween; (c) forming a blanket layer of an insulative material extending over said substrate; (d) exposing a portion of said substrate surface including said pair of facing edges of said pair of spaced-apart source and drain regions and said space therebetween; (e) forming a layer of a gate insulator precursor material on said exposed portion of said substrate surface by electrolytic deposition; (f) converting said layer of electrolytically-deposited gate insulator precursor material into a layer of a gate insulator material; and (g) forming an electrically conductive gate electrode material in contact with said layer of gate insulator material; wherein said steps are performed according to a first sequence (a), (c)-(d), (b), (e)-(g) or according to a second sequence (a)-(g).
Claim 3
Dependent Claim
63 words
The method as in claim 1 , wherein: step (e) comprises cathodically electroplating a metal layer. 3 .The method as in claim 2 , wherein: step (e) comprises electroplating at least one layer of at least one refractory or lanthanum series transition metal selected from the group consisting of Zr, Hf, La, Lu, Eu, Pr, Nd, Gd, Dy, and alloys and mixtures thereof.
Claim 4
Dependent Claim
33 words
The method as in claim 1 , wherein: step (f) comprises converting said layer of gate insulator precursor material into a layer of a gate insulator material by reaction with at least oxygen.
Claim 5
Dependent Claim
44 words
The method as in claim 4 , wherein: step (f) comprises reacting said layer of gate insulator precursor material with oxygen to form a layer of a high-k gate insulator material comprising at least one refractory metal oxide or lanthanum series transition metal oxide.
Claim 6
Dependent Claim
20 words
The method as in claim 5 , wherein: step (f) comprises electrolytically anodizing said layer of gate insulator precursor material.
Claim 7
Dependent Claim
35 words
The method as in claim 5 , wherein: step (f) comprises forming at least one refractory metal oxide selected from the group consisting of zirconium oxide (ZrO 2 ) and hafnium oxide (HfO 2 ).
Claim 8
Dependent Claim
48 words
The method as in claim 4 , wherein: step (f) comprises reacting said layer of gate insulator precursor material with oxygen and said semiconductor substrate to form a layer of a high-k gate insulator material comprising at least one refractory metal silicate or lanthanum series transition metal silicate.
Claim 9
Dependent Claim
20 words
The method as in claim 8 , wherein: step (f) comprises thermally oxidizing said layer of gate insulator precursor material.
Claim 10
Dependent Claim
35 words
The method as in claim 8 , wherein: step (f) comprises forming at least one refractory metal silicate selected from the group consisting of zirconium silicate (ZrSiO 4 ) and hafnium silicate (HfSiO 4 ).
Claim 11
Dependent Claim
31 words
The method as in claim 1 , wherein: step (g) comprises forming a blanket layer of an electrically conductive material selected from the group consisting of metals, metal compounds, and semiconductors.
Claim 12
Dependent Claim
39 words
The method as in claim 11 , further comprising the sequential steps of: (h) planarizing said blanket layer of electrically conductive material, and (i) forming electrical contacts to each of said source and drain regions and said gate electrode.
Claim 13
Dependent Claim
40 words
The method as in claim 1 , wherein: step (a) comprises providing a semiconductor substrate comprising a material selected from the group consisting of silicon (Si), germanium (Ge), gallium arsenide (GaAs), silicon-germanium (SiGe), silicon-on-insulator (SOI), and epitaxial semiconductor layer-on-substrate materials.
Claim 14
Dependent Claim
94 words
The method as in claim 1 , wherein said steps are performed according to said first sequence and: step (a) comprises providing a silicon substrate; and step (b) comprises selectively forming a pair of spaced-apart metal silicide layers on respective spaced-apart portions of said substrate surface, introducing a dopant of said second, opposite conductivity type into said pair of spaced-apart metal silicide layers, and forming said pair of spaced-apart source and drain regions by out-diffusion of said dopant of second, opposite conductivity type from said pair of spaced-apart metal silicide layers into said substrate.
Claim 15
Dependent Claim
36 words
The method as in claim 14 , wherein: step (d) comprises forming an opening extending through said layer of insulative material to form said exposed portion of said substrate surface at the bottom of said opening.
Claim 16
Dependent Claim
73 words
The method as in claim 1 , wherein said steps are performed according to said second sequence and: step (b) comprises forming a temporary gate electrode structure on a portion of said substrate surface, and implanting dopant ions of said second, opposite conductivity type into said substrate surface to form said pair of spaced-apart source and drain regions, said temporary gate electrode forming at least part of an implantation mask during said implanting.
Claim 17
Dependent Claim
70 words
The method as in claim 16 , wherein: step (c) comprises forming said blanket layer of an insulative material so as to extend over said temporary gate electrode structure and said substrate, followed by planarization processing of said blanket layer to remove at least the portion thereof overlying said temporary gate electrode structure; and step (d) comprises removing said temporary gate electrode structure to form said exposed substrate surface portion.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2004-10-08 | 2005-04-09 | 2005-10-09 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2008-10-08 | 2009-04-09 | 2009-10-09 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2012-10-08 | 2013-04-09 | 2013-10-09 | $7700.00 | Window Closed / Lapsed |