Patent US6266274B1 successfully refreshed from Google Patents.
US6266274B1
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US
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Semiconductor memory with non-volatile two-transistor memory cells
Assignee: Infineon Technologies AG
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Filing: 2000-01-14
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Granted: 2001-07-24
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Expires: 2020-01-14
Abstract
Abstract The invention relates to a semiconductor memory having a non-volatile two-transistor memory cell which has an N-channel selection transistor and an N-channel memory transistor. The drive circuitry for the cell includes a P-channel transfer transistor. A transfer channel is connected to a row line leading to the memory cell. This enables the voltages required for programming to be obtained with relatively little technological complexity.
Inventors
- 👤 Wolfgang Pockrandt
- 👤 Holger Sedlak
- 👤 Hans-Heinrich Viehmann
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-09 09:18
CPC Classifications
G; G11; G11C; G11C16/00; G11C16/02; G11C16/04; G11C16/0408; G11C16/0433
Claims Analysis
Total Claims: 10
Claim 1
Independent Claim
106 words
A semiconductor memory, comprising: a row line and a column line; at least one memory cell formed of an N-channel selection transistor having a selection gate connected to said row line, a first selection channel connection connected to said column line and a second selection channel connection; an N-channel memory transistor having a memory gate, a first memory channel connection connected to said second selection channel connection, and a second memory channel connection; at least one P-channel transfer transistor having a first transfer channel connection connected to said memory gate and a second transfer channel connection connected to said row line leading to said memory cell.
Claim 2
Dependent Claim
106 words
A semiconductor memory, comprising: a row line and a column line; at least one memory cell formed of an N-channel selection transistor having a selection gate connected to said row line, a first selection channel connection connected to said column line and a second selection channel connection; an N-channel memory transistor having a memory gate, a first memory channel connection connected to said second selection channel connection, and a second memory channel connection; at least one P-channel transfer transistor having a first transfer channel connection connected to said memory gate and a second transfer channel connection connected to said row line leading to said memory cell.
Claim 3
Dependent Claim
37 words
The semiconductor memory according to claim 1 , wherein said transfer transistor includes a transfer gate, and which further comprises a control line connected to said transfer gate for driving said transfer transistor via said control line.
Claim 4
Dependent Claim
35 words
The semiconductor memory according to claim 2 , which further comprises an N-channel discharge transistor having a discharge gate connected to said control line, and a first discharge channel connection connected to said memory gate.
Claim 5
Dependent Claim
22 words
The semiconductor memory according to claim 3 , wherein said N-channel discharge transistor has a second discharge channel connection connected to ground.
Claim 6
Dependent Claim
79 words
The semiconductor memory according to claim 1 , wherein said at least one memory cell is one of a plurality of memory cells arranged in rows and columns, and wherein: within the rows, said selection gates of a plurality of said memory cells are connected in parallel, and said memory gates of a plurality of memory cells are connected in parallel; and within the columns, said first memory channels and respectively said second selection channels are connected in parallel.
Claim 7
Dependent Claim
61 words
The semiconductor memory according to claim 5 , which comprises a drive circuit of at least one of said columns having a P-channel block selection transistor with a block selection gate, a first block selection channel connection connected to said row line leading to said memory cell, and a second block selection channel connection connected to said first transfer channel connection.
Claim 8
Dependent Claim
36 words
The semiconductor memory according to claim 6 , which comprises a block selection control line connected to said block selection gates such that said block selection transistors can be driven via said block selection control line.
Claim 9
Dependent Claim
106 words
A semiconductor memory, comprising: a row line and a column line; at least one memory cell formed of a P-channel selection transistor having a selection gate connected to said row line, a first selection channel connection connected to said column line and a second selection channel connection; a P-channel memory transistor having a memory gate, a first memory channel connection connected to said second selection channel connection, and a second memory channel connection; at least one N-channel transfer transistor having a first transfer channel connection connected to said memory gate and a second transfer channel connection connected to said row line leading to said memory cell.
Claim 10
Dependent Claim
106 words
A semiconductor memory, comprising: a row line and a column line; at least one memory cell formed of a P-channel selection transistor having a selection gate connected to said row line, a first selection channel connection connected to said column line and a second selection channel connection; a P-channel memory transistor having a memory gate, a first memory channel connection connected to said second selection channel connection, and a second memory channel connection; at least one N-channel transfer transistor having a first transfer channel connection connected to said memory gate and a second transfer channel connection connected to said row line leading to said memory cell.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2004-07-23 | 2005-01-22 | 2005-07-24 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2008-07-23 | 2009-01-22 | 2009-07-24 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2012-07-23 | 2013-01-22 | 2013-07-24 | $7700.00 | Window Closed / Lapsed |