US6204566B1
Expired / Lapsed
US
⏱️ 0.0 years remaining
Resin encapsulated electrode structure of a semiconductor device, mounted semiconductor devices, and semiconductor wafer including multiple electrode structures
Assignee: Renesas Electronics Corp
•
Filing: 1999-02-19
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Granted: 2001-03-20
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Expires: 2019-02-19
Abstract
Abstract A semiconductor integrated circuit device includes a semiconductor substrate having a first surface and including electrodes on the first surface of the semiconductor substrate; a glass coating film covering the first surface of the semiconductor substrate except the electrodes; an external electrode on the electrode in electrical contact with the electrode and having a polished external surface; and a cured resin layer on the glass coating film forming a barrier against intrusion of moisture and ions into the semiconductor substrate, and having the same area as the semiconductor substrate, and a polished external surface.
Inventors
- 👤 Kohji Shinomiya
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-01 20:58
CPC Classifications
H; H10; H10W; H10W40/00; H10W40/10; H10W72/00; H10W72/30; H10W74/00; H10W74/01; H10W74/012; H10W74/10; H10W74/111; H10W74/114; H10W74/131; H10W74/141; H10W74/15; H10W72/01; H10W72/013; H10W72/01331; H10W72/019; H10W72/071; H10W72/0711; H10W72/07178; H10W72/072; H10W72/07231; H10W72/07236; H10W72/20; H10W72/241; H10W72/851; H10W72/853; H10W72/856; H10W72/874; H10W72/877; H10W72/90; H10W72/941; H10W72/9415; H10W90/00; H10W90/701; H10W90/721; H10W90/724; H10W90/726
Claims Analysis
Total Claims: 17
Claim 1
Independent Claim
102 words
A semiconductor integrated circuit device comprising: a semiconductor substrate having a first surface and including an electrode on the first surface of the semiconductor substrate; a glass coating film covering the first surface of the semiconductor substrate except the electrode; an external electrode on the electrode, in electrical contact with the electrode, and having a substantially planar polished external surface; and a cured resin layer on the glass coating film, forming a barrier against intrusion of moisture and ions into the semiconductor substrate, the cured resin layer having the same area as the semiconductor substrate and a substantially planar polished external surface.
Claim 2
Dependent Claim
102 words
A semiconductor integrated circuit device comprising: a semiconductor substrate having a first surface and including an electrode on the first surface of the semiconductor substrate; a glass coating film covering the first surface of the semiconductor substrate except the electrode; an external electrode on the electrode, in electrical contact with the electrode, and having a substantially planar polished external surface; and a cured resin layer on the glass coating film, forming a barrier against intrusion of moisture and ions into the semiconductor substrate, the cured resin layer having the same area as the semiconductor substrate and a substantially planar polished external surface.
Claim 3
Dependent Claim
21 words
The semiconductor integrated circuit device as defined in claim 1 wherein the external electrode has a larger area than the electrode.
Claim 4
Dependent Claim
21 words
The semiconductor integrated circuit device as defined in claim 1 including an electrode underlayer between said electrode and said external electrode.
Claim 5
Dependent Claim
33 words
The semiconductor integrated circuit device as defined in claim 1 including a silicon dioxide film disposed on the substrate and wherein the electrode is disposed in an aperture in the silicon dioxide film.
Claim 6
Dependent Claim
33 words
The semiconductor integrated circuit device as defined in claim 1 including a silicon nitride film disposed on the substrate and wherein the electrode is disposed in an aperture in the silicon nitride film.
Claim 7
Dependent Claim
36 words
The semiconductor integrated circuit device as defined in claim 1 wherein the substantially planar polished external surface of the cured resin layer and the substantially planar polished external surface of the external electrode are substantially coplanar.
Claim 8
Dependent Claim
18 words
A multi-chip module comprising a plurality of semiconductor devices of claim 1 soldered to a multi-chip module board.
Claim 9
Dependent Claim
22 words
The semiconductor integrated circuit device as defined in claim 3 wherein the external electrode has a larger area than the electrode underlayer.
Claim 10
Dependent Claim
16 words
The semiconductor integrated circuit device as defined in claim 6 including solder on the external electrode.
Claim 11
Dependent Claim
113 words
A mounting substrate comprising: a semiconductor substrate having a first surface and including an electrode on the first surface of the semiconductor substrate; a glass coating film covering the first surface of the semiconductor substrate except the electrode; an external electrode on the electrode, in electrical contact with the electrode, and having a substantially planar polished external surface; a cured resin layer on the glass coating film, forming a barrier against intrusion of moisture and ions into the semiconductor substrate, the cured resin layer having the same area as the semiconductor substrate and a substantially planar polished external surface; and a mounting substrate wherein the mounting substrate is soldered to the semiconductor substrate.
Claim 12
Dependent Claim
113 words
A mounting substrate comprising: a semiconductor substrate having a first surface and including an electrode on the first surface of the semiconductor substrate; a glass coating film covering the first surface of the semiconductor substrate except the electrode; an external electrode on the electrode, in electrical contact with the electrode, and having a substantially planar polished external surface; a cured resin layer on the glass coating film, forming a barrier against intrusion of moisture and ions into the semiconductor substrate, the cured resin layer having the same area as the semiconductor substrate and a substantially planar polished external surface; and a mounting substrate wherein the mounting substrate is soldered to the semiconductor substrate.
Claim 13
Dependent Claim
14 words
The mounting substrate as defined in claim 10 comprising solder on the external electrode.
Claim 14
Dependent Claim
19 words
The mounting substrate of claim 10 wherein the mounting substrate is a burn-in board for performing a burn-in test.
Claim 15
Dependent Claim
24 words
The mounting substrate of claim 10 including a heat radiating fin adhered by a conductive grease to a rear surface of the semiconductor substrate.
Claim 16
Dependent Claim
109 words
A semiconductor wafer comprising a plurality of semiconductor devices, each semiconductor device comprising: a semiconductor substrate having a first surface and including an electrode on the first surface of the semiconductor substrate; a glass coating film covering the first surface of the semiconductor substrate except the electrode; an external electrode on the electrode, in electrical contact with the electrode, and having a substantially planar polished external surface; and a cured resin layer on the glass coating film, forming a barrier against intrusion of moisture and ions into the semiconductor substrate, the cured resin layer having the same area as the semiconductor substrate and a substantially planar polished external surface.
Claim 17
Dependent Claim
109 words
A semiconductor wafer comprising a plurality of semiconductor devices, each semiconductor device comprising: a semiconductor substrate having a first surface and including an electrode on the first surface of the semiconductor substrate; a glass coating film covering the first surface of the semiconductor substrate except the electrode; an external electrode on the electrode, in electrical contact with the electrode, and having a substantially planar polished external surface; and a cured resin layer on the glass coating film, forming a barrier against intrusion of moisture and ions into the semiconductor substrate, the cured resin layer having the same area as the semiconductor substrate and a substantially planar polished external surface.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2004-03-19 | 2004-09-18 | 2005-03-20 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2008-03-19 | 2008-09-18 | 2009-03-20 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2012-03-19 | 2012-09-18 | 2013-03-20 | $7700.00 | Window Closed / Lapsed |