Semiconductor device

Claim 2

A semiconductor device, comprising at least: a source region, a drain region and a channel forming region formed by utilizing a mono-crystal semiconductor thin film on an insulating layer; a field oxide film surrounding said source region, said drain region and said channel forming region; and a gate insulating film and a gate electrode formed on said channel forming region; impurity regions which shift an energy band of said channel forming region being provided selectively at side edges of said channel forming region contacting with said field oxide film.

Claim 3

A semiconductor device, comprising at least: a source region, a drain region and a channel forming region formed by utilizing a mono-crystal semiconductor thin film on an insulating layer; a field oxide film surrounding said source region, said drain region and said channel forming region; and a gate insulating film and a gate electrode formed on said channel forming region; impurity regions which shift an energy band of said channel forming region being provided selectively at side edges of said channel forming region contacting with said field oxide film; and said impurity regions suppressing a depletion layer from spreading from said drain region to said source region.

Claim 4

A semiconductor device, comprising at least: a source region, a drain region and a channel forming region formed by utilizing a mono-crystal semiconductor thin film on an insulating layer; a field oxide film surrounding said source region, said drain region and said channel forming region; and a gate insulating film and a gate electrode formed on said channel forming region; impurity regions which shift an energy band of said channel forming region being provided selectively at side edges of said channel forming region contacting with said field oxide film; and said impurity regions suppressing a depletion layer from spreading from said drain region to said source region.

Claim 5

A semiconductor device, comprising at least: a source region, a drain region and a channel forming region formed by utilizing a mono-crystal semiconductor thin film on an insulating layer; a field oxide film surrounding said source region, said drain region and said channel forming region; and a gate insulating film and a gate electrode formed on said channel forming region; impurity regions which shift an energy band of said channel forming region being provided selectively at side edges of said channel forming region contacting with said field oxide film; and said impurity regions suppressing a depletion layer from spreading from said drain region to said source region and drawing out minority carriers generated by impact ionization in the vicinity of said drain region to the outside of said channel forming region.

Claim 6

A semiconductor device, comprising at least: a source region, a drain region and a channel forming region formed by utilizing a mono-crystal semiconductor thin film on an insulating layer; a field oxide film surrounding said source region, said drain region and said channel forming region; and a gate insulating film and a gate electrode formed on said channel forming region; impurity regions which shift an energy band of said channel forming region being provided selectively at side edges of said channel forming region contacting with said field oxide film; and said impurity regions suppressing a depletion layer from spreading from said drain region to said source region and drawing out minority carriers generated by impact ionization in the vicinity of said drain region to the outside of said channel forming region.

Claim 7

A semiconductor device, comprising at least: a source region, a drain region and a channel forming region formed by utilizing a mono-crystal semiconductor thin film on an insulating layer; a field oxide film surrounding said source region, said drain region and said channel forming region; and a gate insulating film and a gate electrode formed on said channel forming region; impurity regions which shift an energy band of said channel forming region being provided selectively at side edges of said channel forming region contacting with said field oxide film; and said impurity regions reaching the inside of said source region/drain region.

Claim 8

A semiconductor device, comprising at least: a source region, a drain region and a channel forming region formed by utilizing a mono-crystal semiconductor thin film on an insulating layer; a field oxide film surrounding said source region, said drain region and said channel forming region; and a gate insulating film and a gate electrode formed on said channel forming region; impurity regions which shift an energy band of said channel forming region being provided selectively at side edges of said channel forming region contacting with said field oxide film; and said impurity regions reaching the inside of said source region/drain region.

Claim 9

The semiconductor device according to any one of claims 1 through 4 , wherein an impurity element presenting a conductive type opposite from a conductive type of said source region or said drain region is doped to said impurity regions.

Claim 10

The semiconductor device according to any one of claims 1 through 4 , wherein an element selected from the XV group is doped to said source and drain regions and an element selected from the XIII group is doped to said impurity regions.

Claim 11

The semiconductor device according to claim 6 , wherein the element selected from said XV group is phosphorus, arsenic or antimony and the element selected from said XIII group is boron or indium.

Claim 12

The semiconductor device according to any one of claims 1 through 4 , wherein said channel forming region becomes a moving path of majority carriers and said impurity region becomes a moving path of minority carriers.

Claim 13

The semiconductor device according to any one of claims 1 through 4 , wherein said channel forming region is a region intrinsic or substantially intrinsic.

Claim 14

The semiconductor device according to any one of claims 1 through 4 , wherein a length (channel length) of said channel forming region is 30 to 500 nm and a width (channel width) of said channel forming region is 30 to 500 nm.

Claim 15

A semiconductor device, comprising at least: a source region, a drain region and a channel forming region formed by utilizing a mono-crystal semiconductor thin film on an insulating layer; a field oxide film surrounding said source region, said drain region and said channel forming region; and a gate insulating film and a gate electrode formed on said channel forming region; first impurity regions which shift an energy band of said channel forming region being provided selectively at side edges of said channel forming region contacting with said field oxide film; and a second impurity region presenting a conductive type opposite from said first impurity region being formed intentionally and locally within said channel forming region so as not to contact with said source region/drain region and said first impurity regions.

Claim 16

A semiconductor device, comprising at least: a source region, a drain region and a channel forming region formed by utilizing a mono-crystal semiconductor thin film on an insulating layer; a field oxide film surrounding said source region, said drain region and said channel forming region; and a gate insulating film and a gate electrode formed on said channel forming region; first impurity regions which shift an energy band of said channel forming region being provided selectively at side edges of said channel forming region contacting with said field oxide film; and a second impurity region presenting a conductive type opposite from said first impurity region being formed intentionally and locally within said channel forming region so as not to contact with said source region/drain region and said first impurity regions.

Claim 17

A semiconductor device, comprising at least: a source region, a drain region and a channel forming region formed by utilizing a mono-crystal semiconductor thin film on an insulating layer; a field oxide film surrounding said source region, said drain region and said channel forming region; and a gate insulating film and a gate electrode formed on said channel forming region; first impurity regions which shift an energy band of said channel forming region being provided selectively at side edges of said channel forming region contacting with said field oxide film; a second impurity region presenting a conductive type opposite from said first impurity region being formed intentionally and locally within said channel forming region so as not to contact with said source region/drain region and said first impurity regions; and said first impurity regions suppressing a depletion layer from spreading from said drain region to said source region and said second impurity region controlling a threshold voltage.

Claim 18

A semiconductor device, comprising at least: a source region, a drain region and a channel forming region formed by utilizing a mono-crystal semiconductor thin film on an insulating layer; a field oxide film surrounding said source region, said drain region and said channel forming region; and a gate insulating film and a gate electrode formed on said channel forming region; first impurity regions which shift an energy band of said channel forming region being provided selectively at side edges of said channel forming region contacting with said field oxide film; a second impurity region presenting a conductive type opposite from said first impurity region being formed intentionally and locally within said channel forming region so as not to contact with said source region/drain region and said first impurity regions; and said first impurity regions suppressing a depletion layer from spreading from said drain region to said source region and said second impurity region controlling a threshold voltage.

Claim 19

A semiconductor device, comprising at least: a source region, a drain region and a channel forming region formed by utilizing a mono-crystal semiconductor thin film on an insulating layer; a field oxide film surrounding said source region, said drain region and said channel forming region; and a gate insulating film and a gate electrode formed on said channel forming region; first impurity regions which shift an energy band of said channel forming region being provided selectively at side edges of said channel forming region contacting with said field oxide film; a second impurity region presenting a conductive type opposite from said first impurity region being formed intentionally and locally within said channel forming region so as not to contact with said source region/drain region and said first impurity regions; and said first impurity regions suppressing a depletion layer from spreading from said drain region to said source region and drawing out minority carriers generated by impact ionization in the vicinity of said drain region to the outside of said channel forming region and said second impurity region controlling a threshold voltage.

Claim 20

A semiconductor device, comprising at least: a source region, a drain region and a channel forming region formed by utilizing a mono-crystal semiconductor thin film on an insulating layer; a field oxide film surrounding said source region, said drain region and said channel forming region; and a gate insulating film and a gate electrode formed on said channel forming region; first impurity regions which shift an energy band of said channel forming region being provided selectively at side edges of said channel forming region contacting with said field oxide film; a second impurity region presenting a conductive type opposite from said first impurity region being formed intentionally and locally within said channel forming region so as not to contact with said source region/drain region and said first impurity regions; and said first impurity regions suppressing a depletion layer from spreading from said drain region to said source region and drawing out minority carriers generated by impact ionization in the vicinity of said drain region to the outside of said channel forming region and said second impurity region controlling a threshold voltage.

Claim 21

The semiconductor device according to any one of claims 11 through 13 , wherein an impurity element giving a conductive type opposite from a conductive type of said source region or said drain region is doped to said first impurity regions and an impurity element giving the same conductive type with a conductive type of said source region or said drain region is doped to said second impurity region.

Claim 22

The semiconductor device according to any one of claims 11 through 13 , wherein an element selected from the XIII group is doped to said source region and said drain region as well as to said second impurity region and an element selected from the XV group is doped to said first impurity region.

Claim 23

The semiconductor device according to claim 15 , wherein the element selected from said XV group is phosphorus, arsenic or antimony and the element selected from said XIII group is boron or indium.

Claim 24

The semiconductor device according to any one of claims 11 through 13 , wherein said channel forming region and said second impurity region become a moving path of majority carriers and said first impurity regions become moving paths of minority carriers.

Claim 25

The semiconductor device according to any one of claims 11 through 13 , wherein said channel forming region is a region intrinsic or substantially intrinsic.

Claim 26

The semiconductor device according to any one of claims 11 through 13 , wherein a length (channel length) of said channel forming region is 30 to 500 nm and a width (channel width) of said channel forming region is 30 to 500 nm.

Claim 27

The semiconductor device according to any one of claims 1 through 4 , wherein said impurity regions are provided so as to be straddled said channel forming region and said field oxide film.

Claim 28

The semiconductor device according to any one of claims 11 through 13 , wherein said first impurity regions are provided so as to be straddled said channel forming region and said field oxide film.

Claim 29

The semiconductor device according to any one of claims 1 through 4 , wherein the other impurity region is formed in said channel forming region and said source region so as not to contact with said impurity regions and said drain region.

Claim 30

The semiconductor device according to any one of claims 1 through 4 , wherein the other impurity region is formed in said channel forming region and said drain region so as not to contact with said impurity regions and said source region.