US6180957B1
Expired / Lapsed
US
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Thin-film semiconductor device, and display system using the same
Assignee: Seiko Epson Corp
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Filing: 1997-04-08
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Granted: 2001-01-30
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Expires: 2017-04-08
Abstract
Abstract A high-performance thin-film semiconductor device and a simple fabrication method is provided. After a silicon film is deposited at approximately or less 580° C. and at a deposition rate of at least approximately 6 Å/minute, thermal oxidation is performed. This ensures an easy and simple fabrication of a high-performance thin-film semiconductor device. A thin-film semiconductor device capable of low-voltage and high-speed drive is provided. The short-channel type of a TFT circuit with an LDD structure reduces a threshold voltage, increases speed, restrains the power consumption and increases a breakdown voltage. The operational speeds of the thin-film semiconductor device is further increased by optimizing the maximum impurity concentration of an LDD portion, a source portion a drain portion, as well as optimizing the LDD length and the channel length. A display system is provided using these TFTs having drive signals at or below approximately the TTL level.
Inventors
- 👤 Mitsutoshi Miyasaka
- 👤 Yojiro Matsueda
- 👤 Satoshi Takenaka
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-09 09:10
CPC Classifications
H; H10; H10P; H10P14/00; H10P14/20; H10P14/24; G; G02; G02F; G02F1/00; G02F1/01; G02F1/13; G02F1/133; G02F1/1333; G02F1/1345; G02F1/13454; G09; G09G; G09G3/00; G09G3/20; G09G3/2007; G09G3/2011; G09G3/34; G09G3/36; G09G3/3611; G09G3/3648; G09G3/3685; G09G3/3688; H10D; H10D30/00; H10D30/01; H10D30/021; H10D30/031; H10D30/0312; H10D30/0314; H10D30/0321; H10D30/60; H10D30/67; H10D30/6704; H10D30/6713; H10D30/6715; H10D30/6719; H10D30/6729; H10D30/673; H10D30/6731; H10D30/674; H10D30/6741; H10D30/6743; H10D30/6745; H10D86/00; H10D86/40; H10D86/60; H10P14/29; H10P14/2901; H10P14/2921; H10P14/32; H10P14/3202; H10P14/3238; H10P14/34; H10P14/3402; H10P14/3404; H10P14/3411; G09G2310/00; G09G2310/02; G09G2310/0264; G09G2310/027; G09G2310/0283; G09G2310/0289; G09G2320/00; G09G2320/02; G09G2320/028; G09G2330/00; G09G2330/02; G09G2330/021
Claims Analysis
Total Claims: 25
Claim 1
Independent Claim
180 words
A thin-film semiconductor device comprising an N type polycrystalline thin film transistor formed on an insulating material portion which covers at least one portion of a surface of a substrate, wherein said N type polycrystalline thin film transistor comprises: a first impurity-doped semiconductor film located in a source portion and a drain portion of the thin-film semiconductor device and a maximum impurity concentration of said first impurity-doped semiconductor film being between approximately 5×10 19 cm −3 and approximately 1×10 21 cm −3 ; and a second impurity-doped semiconductor film located in one of at least an area between the drain portion and a channel portion and an area between the source portion and the channel portion of said thin-film semiconductor device, and a maximum impurity concentration of said second impurity-doped semiconductor film being between approximately 1×10 18 cm −3 and approximately 1×10 19 cm −3 , an LDD length in one of said drain portion and said source portion being between approximately 1 μm and approximately 4 μm, and a length of a gate electrode being 5 μm or less.
Claim 2
Dependent Claim
180 words
A thin-film semiconductor device comprising an N type polycrystalline thin film transistor formed on an insulating material portion which covers at least one portion of a surface of a substrate, wherein said N type polycrystalline thin film transistor comprises: a first impurity-doped semiconductor film located in a source portion and a drain portion of the thin-film semiconductor device and a maximum impurity concentration of said first impurity-doped semiconductor film being between approximately 5×10 19 cm −3 and approximately 1×10 21 cm −3 ; and a second impurity-doped semiconductor film located in one of at least an area between the drain portion and a channel portion and an area between the source portion and the channel portion of said thin-film semiconductor device, and a maximum impurity concentration of said second impurity-doped semiconductor film being between approximately 1×10 18 cm −3 and approximately 1×10 19 cm −3 , an LDD length in one of said drain portion and said source portion being between approximately 1 μm and approximately 4 μm, and a length of a gate electrode being 5 μm or less.
Claim 3
Dependent Claim
124 words
A thin-film semiconductor device comprising a non-single-crystal semiconductor film formed on an insulating material portion which covers at least one portion of a surface of a substrate, wherein said non-single-crystal semiconductor film comprises: a first impurity-doped semiconductor film located in a source portion and a drain portion of the thin-film semiconductor device; and a second impurity-doped semiconductor film located in at least one of an area between the drain portion and a channel portion and an area between the source and the channel portions of said thin-film semiconductor device, and wherein an LDD length of a drain portion is Llddd, a distance from a channel portion side edge of a contact hole in said drain portion to a gate electrode is Lcontd, and 0.8×Llddd≦Lcontd≦1.2×Llddd.
Claim 4
Dependent Claim
124 words
A thin-film semiconductor device comprising a non-single-crystal semiconductor film formed on an insulating material portion which covers at least one portion of a surface of a substrate, wherein said non-single-crystal semiconductor film comprises: a first impurity-doped semiconductor film located in a source portion and a drain portion of the thin-film semiconductor device; and a second impurity-doped semiconductor film located in at least one of an area between the drain portion and a channel portion and an area between the source and the channel portions of said thin-film semiconductor device, and wherein an LDD length of a drain portion is Llddd, a distance from a channel portion side edge of a contact hole in said drain portion to a gate electrode is Lcontd, and 0.8×Llddd≦Lcontd≦1.2×Llddd.
Claim 5
Dependent Claim
124 words
A thin-film semiconductor device comprising a non-single-crystal semiconductor film formed on an insulating material portion which covers at least one portion of a surface of a substrate, wherein said non-single-crystal semiconductor film comprises: a first impurity-doped semiconductor film located in a source portion and a drain portion of the thin-film semiconductor device; and a second impurity-doped semiconductor film located in at least one of an area between the drain portion and a channel portion and an area between the source and the channel portions of said thin-film semiconductor device, and wherein an LDD length of said source portion is Lldds, a distance from a channel portion side edge of a contact hole in said source portion to a gate electrode is Lconts, and 0.8×Lldds≦Lconts≦1.2×Lldds.
Claim 6
Dependent Claim
124 words
A thin-film semiconductor device comprising a non-single-crystal semiconductor film formed on an insulating material portion which covers at least one portion of a surface of a substrate, wherein said non-single-crystal semiconductor film comprises: a first impurity-doped semiconductor film located in a source portion and a drain portion of the thin-film semiconductor device; and a second impurity-doped semiconductor film located in at least one of an area between the drain portion and a channel portion and an area between the source and the channel portions of said thin-film semiconductor device, and wherein an LDD length of said source portion is Lldds, a distance from a channel portion side edge of a contact hole in said source portion to a gate electrode is Lconts, and 0.8×Lldds≦Lconts≦1.2×Lldds.
Claim 7
Dependent Claim
141 words
A thin-film semiconductor device comprising a non-single-crystal semiconductor film formed on an insulating material portion which covers at least one portion of a surface of a substrate, wherein said non-single-crystal semiconductor film is deposited by a chemical vapor deposition method and has an average grain area of at least approximately 10,000 nm 2 , said non-single-crystal semiconductor film comprising: a first impurity-doped semiconductor film located in a source portion and a drain portion of the thin-film semiconductor device; and a second impurity-doped semiconductor film located in at least one of an area between the drain portion and a channel portion and an area between the source portion and the channel portion of said thin-film semiconductor device, wherein a maximum impurity concentration of said second impurity-doped semiconductor film is between approximately 2×10 17 cm −3 and approximately 1×10 19 cm −3 .
Claim 8
Dependent Claim
141 words
A thin-film semiconductor device comprising a non-single-crystal semiconductor film formed on an insulating material portion which covers at least one portion of a surface of a substrate, wherein said non-single-crystal semiconductor film is deposited by a chemical vapor deposition method and has an average grain area of at least approximately 10,000 nm 2 , said non-single-crystal semiconductor film comprising: a first impurity-doped semiconductor film located in a source portion and a drain portion of the thin-film semiconductor device; and a second impurity-doped semiconductor film located in at least one of an area between the drain portion and a channel portion and an area between the source portion and the channel portion of said thin-film semiconductor device, wherein a maximum impurity concentration of said second impurity-doped semiconductor film is between approximately 2×10 17 cm −3 and approximately 1×10 19 cm −3 .
Claim 9
Dependent Claim
173 words
A thin-film semiconductor device comprising a non-single-crystal semiconductor film formed on an insulating material portion which covers at least one portion of a surface of a substrate, wherein said non-single-crystal semiconductor film is deposited by a chemical vapor deposition method and has an average grain area of at least approximately 10,000 nm 2 , said non-single-crystal semiconductor film comprising: a first impurity-doped semiconductor film located in a source portion and a drain portion of the thin-film semiconductor device; and a second impurity-doped semiconductor film located in at least one of a first area between the drain portion and a channel portion and a second area between the source portion and the channel portion of said thin-film semiconductor device, wherein an LDD length of at least one of said second impurity-doped semiconductor film located in the first area between the drain portion and the channel portion and said second impurity-doped semiconductor film located in the second area between the source portion and the channel portion is between approximately 0.3 μm and approximately 4 μm.
Claim 10
Dependent Claim
173 words
A thin-film semiconductor device comprising a non-single-crystal semiconductor film formed on an insulating material portion which covers at least one portion of a surface of a substrate, wherein said non-single-crystal semiconductor film is deposited by a chemical vapor deposition method and has an average grain area of at least approximately 10,000 nm 2 , said non-single-crystal semiconductor film comprising: a first impurity-doped semiconductor film located in a source portion and a drain portion of the thin-film semiconductor device; and a second impurity-doped semiconductor film located in at least one of a first area between the drain portion and a channel portion and a second area between the source portion and the channel portion of said thin-film semiconductor device, wherein an LDD length of at least one of said second impurity-doped semiconductor film located in the first area between the drain portion and the channel portion and said second impurity-doped semiconductor film located in the second area between the source portion and the channel portion is between approximately 0.3 μm and approximately 4 μm.
Claim 11
Dependent Claim
150 words
A thin-film semiconductor device comprising a non-single-crystal semiconductor film formed on an insulating material portion which covers at least one portion of a surface of a substrate, wherein said non-single-crystal semiconductor film is deposited by a chemical vapor deposition method and has an average grain area of at least approximately 10,000 nm 2 , said non-single-crystal semiconductor film comprising: a first impurity-doped semiconductor film located in a source portion and a drain portion of the thin-film semiconductor device; and a second impurity-doped semiconductor film located in at least one of an area between the drain portion and a channel portion and an area between the source portion and the channel portion of said thin-film semiconductor device, wherein a length of a gate electrode formed on said non-single-crystal semiconductor film is approximately 5 μm or less, a gate insulation film being formed between said gate electrode and said non-single-crystal semiconductor film.
Claim 12
Dependent Claim
150 words
A thin-film semiconductor device comprising a non-single-crystal semiconductor film formed on an insulating material portion which covers at least one portion of a surface of a substrate, wherein said non-single-crystal semiconductor film is deposited by a chemical vapor deposition method and has an average grain area of at least approximately 10,000 nm 2 , said non-single-crystal semiconductor film comprising: a first impurity-doped semiconductor film located in a source portion and a drain portion of the thin-film semiconductor device; and a second impurity-doped semiconductor film located in at least one of an area between the drain portion and a channel portion and an area between the source portion and the channel portion of said thin-film semiconductor device, wherein a length of a gate electrode formed on said non-single-crystal semiconductor film is approximately 5 μm or less, a gate insulation film being formed between said gate electrode and said non-single-crystal semiconductor film.
Claim 13
Dependent Claim
168 words
A thin-film semiconductor device comprising a non-single-crystal semiconductor film formed on an insulating material portion which covers at least one portion of a surface of a substrate, wherein said non-single-crystal semiconductor film is deposited by a chemical vapor deposition method and has an average grain area of at least approximately 10,000 nm 2 , said non-single-crystal semiconductor film comprising: a first impurity-doped semiconductor film located in a source portion and a drain portion of the thin-film semiconductor device; and a second impurity-doped semiconductor film located in at least one of a first area between the drain portion and a channel portion and a second area between the source portion and the channel portion of said thin-film semiconductor device, wherein an LDD length of said second impurity-doped semiconductor film located in the first area between the drain portion and the channel portion is Llddd and a distance from a channel portion side edge of a contact hole in said drain portion to a gate electrode is Lcontd, and 0.8×Llddd≦Lcontd≦1.2×Llddd.
Claim 14
Dependent Claim
168 words
A thin-film semiconductor device comprising a non-single-crystal semiconductor film formed on an insulating material portion which covers at least one portion of a surface of a substrate, wherein said non-single-crystal semiconductor film is deposited by a chemical vapor deposition method and has an average grain area of at least approximately 10,000 nm 2 , said non-single-crystal semiconductor film comprising: a first impurity-doped semiconductor film located in a source portion and a drain portion of the thin-film semiconductor device; and a second impurity-doped semiconductor film located in at least one of a first area between the drain portion and a channel portion and a second area between the source portion and the channel portion of said thin-film semiconductor device, wherein an LDD length of said second impurity-doped semiconductor film located in the first area between the drain portion and the channel portion is Llddd and a distance from a channel portion side edge of a contact hole in said drain portion to a gate electrode is Lcontd, and 0.8×Llddd≦Lcontd≦1.2×Llddd.
Claim 15
Dependent Claim
166 words
A thin-film semiconductor device comprising a non-single-crystal semiconductor film formed on an insulating material portion which covers at least one portion of a surface of a substrate, wherein said non-single-crystal semiconductor film is deposited by a chemical vapor deposition method and has an average grain area of at least approximately 10,000 nm, said non-single-crystal semiconductor film comprising: a first impurity-doped semiconductor film located in a source portion and a drain portion of the thin-film semiconductor device; and a second impurity-doped semiconductor film located in at least one of a first area between the drain portion and a channel portion and a second area between the source portion and the channel portion of said thin-film semiconductor device, wherein an LDD length of said second impurity-doped semiconductor film located in the second area between the source portion and the channel portion is Lldds and a distance from a channel portion side edge of a contact hole in said source portion to a gate electrode is Lconts, and 0.8×Lldds≦Lconts≦1.2×Lldds.
Claim 16
Dependent Claim
166 words
A thin-film semiconductor device comprising a non-single-crystal semiconductor film formed on an insulating material portion which covers at least one portion of a surface of a substrate, wherein said non-single-crystal semiconductor film is deposited by a chemical vapor deposition method and has an average grain area of at least approximately 10,000 nm, said non-single-crystal semiconductor film comprising: a first impurity-doped semiconductor film located in a source portion and a drain portion of the thin-film semiconductor device; and a second impurity-doped semiconductor film located in at least one of a first area between the drain portion and a channel portion and a second area between the source portion and the channel portion of said thin-film semiconductor device, wherein an LDD length of said second impurity-doped semiconductor film located in the second area between the source portion and the channel portion is Lldds and a distance from a channel portion side edge of a contact hole in said source portion to a gate electrode is Lconts, and 0.8×Lldds≦Lconts≦1.2×Lldds.
Claim 17
Dependent Claim
191 words
A CMOS circuit comprising a thin-film semiconductor device and a non-LDD type transistor, the CMOS circuit comprising a non-single-crystal semiconductor film formed on an insulating material portion which covers at least one portion of a surface of a substrate, wherein said non-single-crystal semiconductor film is deposited by a chemical vapor deposition method and has an average grain area of at least approximately 10,000 nm 2 , said non-single-crystal semiconductor film comprising: a first impurity-doped semiconductor film located in a source portion and a drain portion of the thin-film semiconductor device; and a second impurity-doped semiconductor film located in at least one of an area between the drain portion and a channel portion and an area between the source portion and the channel portion of said thin-film semiconductor device, wherein an n-type thin-film transistor of the CMOS circuit is the thin-film semiconductor device and a p-type thin-film transistor is the non-LDD type transistor, the p-type thin film transistor having said second impurity-doped semiconductor film arranged over an entire region of a source portion and a drain portion of the p-type thin-film transistor having an impurity-doped semiconductor film implanted with a p-type impurity.
Claim 18
Dependent Claim
191 words
A CMOS circuit comprising a thin-film semiconductor device and a non-LDD type transistor, the CMOS circuit comprising a non-single-crystal semiconductor film formed on an insulating material portion which covers at least one portion of a surface of a substrate, wherein said non-single-crystal semiconductor film is deposited by a chemical vapor deposition method and has an average grain area of at least approximately 10,000 nm 2 , said non-single-crystal semiconductor film comprising: a first impurity-doped semiconductor film located in a source portion and a drain portion of the thin-film semiconductor device; and a second impurity-doped semiconductor film located in at least one of an area between the drain portion and a channel portion and an area between the source portion and the channel portion of said thin-film semiconductor device, wherein an n-type thin-film transistor of the CMOS circuit is the thin-film semiconductor device and a p-type thin-film transistor is the non-LDD type transistor, the p-type thin film transistor having said second impurity-doped semiconductor film arranged over an entire region of a source portion and a drain portion of the p-type thin-film transistor having an impurity-doped semiconductor film implanted with a p-type impurity.
Claim 19
Dependent Claim
177 words
A thin-film semiconductor device comprising a p-type polycrystalline thin film transistor formed on an insulating material portion which covers at least one portion of a surface of a substrate, wherein said p-type polycrystalline thin film transistor comprises: a first impurity-doped semiconductor film located in a source portion and a drain portion of the thin-film semiconductor device and a maximum impurity concentration of said first impurity-doped semiconductor film is between approximately 5×10 19 cm −3 and approximately 1×10 21 cm −3 ; and a second impurity-doped semiconductor film located one of at least an area between the drain portion and a channel portion and an area between the source portion and the channel portion of said thin-film semiconductor device, and a maximum impurity concentration of said second impurity-doped semiconductor film being between approximately 1×10 18 cm −3 and approximately 1×10 19 cm −3 , an LDD length in one of said drain portion and said source portion being between approximately 1 μm and approximately 4 μm and a length of a gate electrode being 5 μm or less.
Claim 20
Dependent Claim
177 words
A thin-film semiconductor device comprising a p-type polycrystalline thin film transistor formed on an insulating material portion which covers at least one portion of a surface of a substrate, wherein said p-type polycrystalline thin film transistor comprises: a first impurity-doped semiconductor film located in a source portion and a drain portion of the thin-film semiconductor device and a maximum impurity concentration of said first impurity-doped semiconductor film is between approximately 5×10 19 cm −3 and approximately 1×10 21 cm −3 ; and a second impurity-doped semiconductor film located one of at least an area between the drain portion and a channel portion and an area between the source portion and the channel portion of said thin-film semiconductor device, and a maximum impurity concentration of said second impurity-doped semiconductor film being between approximately 1×10 18 cm −3 and approximately 1×10 19 cm −3 , an LDD length in one of said drain portion and said source portion being between approximately 1 μm and approximately 4 μm and a length of a gate electrode being 5 μm or less.
Claim 21
Dependent Claim
238 words
A CMOS circuit comprising a p-type thin film transistor and an n-type thin film transistor, the CMOS circuit comprising: the p-type thin film transistor having a first p-typed impurity-doped semiconductor film implanted with p-type impurities and a second p-typed impurity-doped semiconductor film implanted with p-type impurities, the first p-typed impurity-doped semiconductor film located in a p-type source portion and a p-type drain portion of the p-type thin film transistor, the second p-typed impurity-doped semiconductor film located in at least one of an area between the p-type drain portion and a channel portion of the p-type thin film transistor and an area between the p-type source portion and the channel portion of the p-type thin film transistor; the n-type thin film transistor having a first n-typed impurity-doped semiconductor film implanted with n-type impurities and a second n-typed impurity-doped semiconductor film implanted with n-type impurities, the first n-typed impurity-doped semiconductor film located in an n-type source portion and an n-type drain portion of the n-type thin film transistor, and the second n-typed impurity-doped semiconductor film located in at least one of an area between the n-type drain portion and a channel portion of the n-type thin film transistor and an area between the n-type source portion and the channel portion of the n-type thin film transistor, wherein a gate electrode length of said p-typed thin film transistor is shorter than a gate electrode length of said n-type thin film transistor.
Claim 22
Dependent Claim
238 words
A CMOS circuit comprising a p-type thin film transistor and an n-type thin film transistor, the CMOS circuit comprising: the p-type thin film transistor having a first p-typed impurity-doped semiconductor film implanted with p-type impurities and a second p-typed impurity-doped semiconductor film implanted with p-type impurities, the first p-typed impurity-doped semiconductor film located in a p-type source portion and a p-type drain portion of the p-type thin film transistor, the second p-typed impurity-doped semiconductor film located in at least one of an area between the p-type drain portion and a channel portion of the p-type thin film transistor and an area between the p-type source portion and the channel portion of the p-type thin film transistor; the n-type thin film transistor having a first n-typed impurity-doped semiconductor film implanted with n-type impurities and a second n-typed impurity-doped semiconductor film implanted with n-type impurities, the first n-typed impurity-doped semiconductor film located in an n-type source portion and an n-type drain portion of the n-type thin film transistor, and the second n-typed impurity-doped semiconductor film located in at least one of an area between the n-type drain portion and a channel portion of the n-type thin film transistor and an area between the n-type source portion and the channel portion of the n-type thin film transistor, wherein a gate electrode length of said p-typed thin film transistor is shorter than a gate electrode length of said n-type thin film transistor.
Claim 23
Dependent Claim
36 words
The CMOS circuit as defined in claim 11 , wherein the gate electrode length of said p-type thin-film transistor and the gate electrode length of said n-type thin-film transistor are each approximately 5 μm or less.
Claim 24
Dependent Claim
29 words
The CMOS circuit as defined in claim 11 , wherein a channel width of said n-type thin-film transistor is less than a channel width of said p-type thin-film transistor.
Claim 25
Dependent Claim
36 words
The CMOS circuit as defined in claim 13 , wherein a gate electrode length of said p-type thin-film transistor and a gate electrode length of said n-type thin-film transistor are each approximately 5 μm or less.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
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| 3.5 Years (Year 4) | 2004-01-30 | 2004-07-31 | 2005-01-30 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2008-01-30 | 2008-07-31 | 2009-01-30 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2012-01-30 | 2012-07-31 | 2013-01-30 | $7700.00 | Window Closed / Lapsed |