Patent US5585822A successfully refreshed from Google Patents.
Patent US6165885A successfully refreshed from Google Patents.
US6165885A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Method of making components with solder balls
Assignee: International Business Machines Corp
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Filing: 1998-07-14
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Granted: 2000-12-26
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Expires: 2018-07-14
Abstract
Abstract An electronic component with solder ball connections is provided. A stencil is produced with holes passing through it in an arrangement corresponding to an arrangement of conductive pads on a substrate or integrated circuit. The stencil is made of a solder reflow compatible material. A layer of adhesive is applied to the stencil which is then positioned with the layer of adhesive adjacent the substrate or integrated circuit with the holes aligned with the conductive pads. Solder paste is deposited in the holes and is heated along with the conductive pads to form solder balls on the conductive pads.
Inventors
- 👤 Michael Anthony Gaynes
- 👤 Mark Vincent Pierson
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-09 11:06
CPC Classifications
H; H10; H10W; H10W72/00; H10W72/20; H10W72/071; B; B23; B23K; B23K1/00; B23K1/0008; B23K1/0016; H05; H05K; H05K3/00; H05K3/30; H05K3/32; H05K3/34; H05K3/3465; H05K3/3485; H10W20/00; H10W20/40; H10W70/00; H10W70/01; H10W70/05; H10W70/098; H10W70/60; H10W70/62; H10W70/63; H10W70/635; H10W70/65; H10W70/657; H10W74/00; H10W74/01; H10W74/012; H10W74/10; H10W74/15; H10W90/00; H10W90/701; B23K2101/00; B23K2101/36; B23K2101/40; H05K2201/00; H05K2201/03; H05K2201/0332; H05K2201/0335; H05K2201/035; H05K2201/10; H05K2201/10613; H05K2201/10621; H05K2201/10734; H05K2201/10954; H05K2201/10992; H05K2203/00; H05K2203/01; H05K2203/0104; H05K2203/0113; H05K2203/03; H05K2203/0338; H05K2203/04; H05K2203/043; H05K2203/05; H05K2203/0548; H05K2203/0557; H05K3/321; H05K3/341; H05K3/3431; H05K3/3436; H05K3/346; H10W70/67; H10W70/68; H10W70/682; H10W70/685; H10W72/01; H10W72/011; H10W72/0112; H10W72/012; H10W72/01204; H10W72/01215; H10W72/01221; H10W72/01223; H10W72/01225; H10W72/01251; H10W72/072; H10W72/07221; H10W72/07227; H10W72/07231; H10W72/07236; H10W72/221; H10W72/231; H10W72/241; H10W72/251; H10W72/252; H10W72/50; H10W72/551; H10W72/552; H10W72/5522; H10W72/5524; H10W72/851; H10W72/874; H10W72/877; H10W72/884; H10W72/90; H10W72/921; H10W72/923; H10W72/941; H10W72/9415; H10W72/951; H10W72/952; H10W90/721; H10W90/724; H10W90/731; H10W90/734; H10W90/736; H10W90/751; H10W90/754
Claims Analysis
Total Claims: 9
Claim 1
Independent Claim
130 words
A method of making an electronic component, comprising the steps of: providing an electronic substrate including a wiring layer having an arrangement of electrically conductive pads; producing a stencil of a solder reflow compatible material with holes passing through said stencil, said holes located in a mirror image arrangement corresponding to said arrangement of said electrically conductive pads; applying a layer of a solder reflow compatible adhesive to said stencil; positioning said stencil such that said layer of adhesive is adjacent said electronic substrate and said holes are aligned with said conductive pads; thereafter depositing solder in paste form into and substantially filling said holes, and into contact with said electrically conductive pads; and heating said solder and said electrically conductive pads to form balls of solder on said pads.
Claim 2
Independent Claim
130 words
A method of making an electronic component, comprising the steps of: providing an electronic substrate including a wiring layer having an arrangement of electrically conductive pads; producing a stencil of a solder reflow compatible material with holes passing through said stencil, said holes located in a mirror image arrangement corresponding to said arrangement of said electrically conductive pads; applying a layer of a solder reflow compatible adhesive to said stencil; positioning said stencil such that said layer of adhesive is adjacent said electronic substrate and said holes are aligned with said conductive pads; thereafter depositing solder in paste form into and substantially filling said holes, and into contact with said electrically conductive pads; and heating said solder and said electrically conductive pads to form balls of solder on said pads.
Claim 3
Dependent Claim
14 words
The method of claim 1 wherein said stencil is produced from a polyimide material.
Claim 4
Dependent Claim
14 words
The method of claim 1 wherein said stencil is produced from a silicone rubber.
Claim 5
Dependent Claim
18 words
The method of claim 1 wherein said adhesive is applied as a layer of pressure sensitive silicone adhesive.
Claim 6
Dependent Claim
18 words
The method of claim 1 wherein said solder in paste form is deposited by spreading with a squeegee.
Claim 7
Dependent Claim
17 words
The method of claim 1 further comprising the step of separating said stencil from said electronic substrate.
Claim 8
Independent Claim
131 words
A method of producing a semiconductor chip, comprising the steps of: forming a semiconductor integrated circuit having a wiring layer with an arrangement of electrically conductive pads; producing a stencil of a solder reflow compatible material with holes passing through said stencil, said holes located in a mirror image arrangement corresponding to said arrangement of said electrically conductive pads; applying a layer of a solder reflow compatible adhesive to said stencil; positioning said stencil such that said layer of adhesive is adjacent said integrated circuit and said holes are aligned with said conductive pads; thereafter depositing solder in paste form into and substantially filling said holes, and into contact with said electrically conductive pads; and heating said solder and said electrically conductive pads to form balls of solder on said pads.
Claim 9
Independent Claim
131 words
A method of producing a semiconductor chip, comprising the steps of: forming a semiconductor integrated circuit having a wiring layer with an arrangement of electrically conductive pads; producing a stencil of a solder reflow compatible material with holes passing through said stencil, said holes located in a mirror image arrangement corresponding to said arrangement of said electrically conductive pads; applying a layer of a solder reflow compatible adhesive to said stencil; positioning said stencil such that said layer of adhesive is adjacent said integrated circuit and said holes are aligned with said conductive pads; thereafter depositing solder in paste form into and substantially filling said holes, and into contact with said electrically conductive pads; and heating said solder and said electrically conductive pads to form balls of solder on said pads.
References Cited (Backward Citations)
US4256532A
Cited
US5880017A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2003-12-26 | 2004-06-26 | 2004-12-26 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2007-12-26 | 2008-06-26 | 2008-12-26 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2011-12-26 | 2012-06-26 | 2012-12-26 | $7700.00 | Window Closed / Lapsed |