Patent US6159835A successfully refreshed from Google Patents.
US6159835A
Expired / Lapsed
US
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Encapsulated low resistance gate structure and method for forming same
Assignee: Texas Instruments Inc
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Filing: 2000-04-06
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Granted: 2000-12-12
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Expires: 2020-04-06
Abstract
Abstract An encapsulated gate structure includes a polysilicon layer, a barrier layer overlying the polysilicon layer and having opposing sidewalls, a metal layer overlying the barrier layer and having opposing sidewalls, a top dielectric layer overlying the metal layer and having opposing sidewalls, and a vertically oriented dielectric layer extending over and covering each of the opposing sidewalls of the barrier layer and the metal layer to encapsulate the barrier layer and metal layer on the polysilicon layer. The encapsulated gate and barrier layer are thus unaffected by oxidation and other similar detrimental effects of subsequent processing steps.
Inventors
- 👤 Mark R. Visokay
- 👤 Dirk N. Anderson
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-09 03:40
CPC Classifications
H; H10; H10D; H10D30/00; H10D30/01; H10D30/021; H10D30/0223; H10D30/0225; H10D64/00; H10D64/01; H10D64/013; H10D64/01302; H10D64/01304; H10D64/01306; H10D64/01308; H10D64/01312; H10D64/60; H10D64/66; H10D64/661; H10D64/662; H10D64/664
Claims Analysis
Total Claims: 4
Claim 1
Independent Claim
162 words
A method for forming a gate structure in a semiconductor device, the gate structure formed on a silicon substrate with an overlying layer of gate oxide, the gate structure having an encapsulated metal and barrier layer, the method comprising the acts of: depositing a polysilicon layer on the gate oxide, the polysilicon layer having a top surface; depositing a sacrificial layer; patterning and etching a trench in said sacrificial layer, said trench having opposing sidewalls and exposing said top surface of said polysilicon layer to form a trench bottom; forming a sidewall layer on said trench sidewalls, said sidewall layer extending to said top surface of said polysilicon layer; forming a barrier layer on said top surface of said polysilicon layer; forming a metal layer in said trench to overly said barrier layer and partially fill said trench; forming a top dielectric layer overly said metal layer; removing said sacrificial layer; and etching said polysilicon layer to stop on said gate oxide.
Claim 2
Independent Claim
162 words
A method for forming a gate structure in a semiconductor device, the gate structure formed on a silicon substrate with an overlying layer of gate oxide, the gate structure having an encapsulated metal and barrier layer, the method comprising the acts of: depositing a polysilicon layer on the gate oxide, the polysilicon layer having a top surface; depositing a sacrificial layer; patterning and etching a trench in said sacrificial layer, said trench having opposing sidewalls and exposing said top surface of said polysilicon layer to form a trench bottom; forming a sidewall layer on said trench sidewalls, said sidewall layer extending to said top surface of said polysilicon layer; forming a barrier layer on said top surface of said polysilicon layer; forming a metal layer in said trench to overly said barrier layer and partially fill said trench; forming a top dielectric layer overly said metal layer; removing said sacrificial layer; and etching said polysilicon layer to stop on said gate oxide.
Claim 3
Independent Claim
174 words
A method for forming a gate structure of a semiconductor device, the gate structure formed on a silicon substrate with an overlying layer of gate oxide, the gate structure having an encapsulated metal layer, the method comprising the acts of: depositing a polysilicon layer on the gate oxide; depositing a barrier layer on said polysilicon layer, the barrier layer having a top surface; depositing a sacrificial layer; patterning and etching a trench in said sacrificial layer, said trench having opposing sidewalls and exposing said top surface of said barrier layer to form a trench bottom; forming a sidewall layer on said trench sidewalls, said sidewall layer extending to said top surface of said barrier layer; forming a metal layer in said trench to overly said barrier layer and partially fill said trench; forming a top dielectric layer to overly said metal layer; removing said sacrificial layer to form a stack of metal, top dielectric layer and said dielectric sidewall; and etching said barrier layer and said polysilicon layer to stop on said gate oxide.
Claim 4
Independent Claim
174 words
A method for forming a gate structure of a semiconductor device, the gate structure formed on a silicon substrate with an overlying layer of gate oxide, the gate structure having an encapsulated metal layer, the method comprising the acts of: depositing a polysilicon layer on the gate oxide; depositing a barrier layer on said polysilicon layer, the barrier layer having a top surface; depositing a sacrificial layer; patterning and etching a trench in said sacrificial layer, said trench having opposing sidewalls and exposing said top surface of said barrier layer to form a trench bottom; forming a sidewall layer on said trench sidewalls, said sidewall layer extending to said top surface of said barrier layer; forming a metal layer in said trench to overly said barrier layer and partially fill said trench; forming a top dielectric layer to overly said metal layer; removing said sacrificial layer to form a stack of metal, top dielectric layer and said dielectric sidewall; and etching said barrier layer and said polysilicon layer to stop on said gate oxide.
References Cited (Backward Citations)
US5397909A
Cited
US5349228A
Cited
US5382540A
Cited
US5925918A
Cited
US5998290A
Cited
US6075274A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2003-12-12 | 2004-06-12 | 2004-12-12 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2007-12-12 | 2008-06-12 | 2008-12-12 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2011-12-12 | 2012-06-12 | 2012-12-12 | $7700.00 | Window Closed / Lapsed |