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US6154446A
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Network switching architecture utilizing cell based and packet based per class-of-service head-of-line blocking prevention
Assignee: Avago Technologies International Sales Pte Ltd
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Filing: 1999-06-30
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Granted: 2000-11-28
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Expires: 2019-06-30
Abstract
Abstract A network switch for network communications includes a first data port interface which supports a plurality of data ports which transmit and receive data at a first data rate. A second data port interface is provided; the second data port interface supports a plurality of data ports transmitting and receiving data at a second data rate. A CPU interface is provided, with the CPU interface configured to communicate with a CPU. An internal memory is provided, and communicates with the first data port interface and the second data port interface. A memory management unit is provided, and includes an external memory interface for communicating data from at least one of the first data port interface and the second data port interface and an external memory. A communication channel is provided, with the communication channel communicating data and messaging information between the at least one first data port interface, the at least one second data port interface, the internal memory, and the memory management unit. One data port interface of the first data port interface and the second data port interface includes a head-of-line blocking prevention mechanism. The head-of-line blocking prevention mechanism includes a determination unit for determining when head-of-line blocking is occurring based upon cell based and packet based thresholds.
Inventors
- 👤 Shiri Kadambi
- 👤 Shekhar Ambe
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-08 21:48
CPC Classifications
H; H04; H04L; H04L12/00; H04L12/54; H04L12/56; H04L12/5601; H04L12/28; H04L12/46; H04L12/4604; H04L12/462; H04L12/4625; H04L12/4641; H04L12/4645; H04L12/467; H04L12/5602; H04L45/00; H04L45/24; H04L45/245; H04L45/74; H04L45/742; H04L47/00; H04L47/10; H04L47/12; H04L47/125; H04L47/24; H04L47/2408; H04L47/2441; H04L47/2458; H04L47/30; H04L47/50; H04L47/52; H04L47/522; H04L47/525; H04L47/62; H04L47/6205; H04L47/6215; H04L47/622; H04L47/6225; H04L47/623; H04L49/00; H04L49/10; H04L49/102; H04L49/103; H04L49/104; H04L49/105; H04L49/107; H04L49/108; H04L49/109; H04L49/30; H04L49/3081; H04L49/309; H04L49/35; H04L49/351; H04L49/352; H04L49/60; H04L49/606; H04L49/90; H04L49/901; H04L49/9047; H04L49/9057; H04L49/9063; H04L49/9068; H04L49/9073; H04L67/00; H04L67/01; H04L67/10; H04L69/00; H04L69/16; H04L69/161; H04L12/02; H04L12/16; H04L12/18; H04L12/42; H04L2012/5638; H04L2012/5646; H04L2012/5651; H04L2012/5665; H04L2012/5667; H04L2012/5678; H04L2012/5679; H04L2012/568; H04L2012/5681; H04L2012/5682; H04L2012/5683; H04L49/20; H04L49/201; H04L49/205; H04L49/25; H04L49/253; H04L49/254; H04L49/3009; H04L49/3036; H04L49/3072; H04L49/354; H04L49/602; H04L69/14; H04L69/30; H04L69/32; H04L69/322; H04L69/323; H04L69/329; Y; Y02; Y02D; Y02D30/00; Y02D30/50; Y10; Y10S; Y10S707/00; Y10S707/99931; Y10S707/99941; Y10S707/99944; Y10S707/99945
Claims Analysis
Total Claims: 20
Claim 1
Independent Claim
212 words
A network switch for network communications, said network switch comprising: a first data port interface, said first data port interface supporting a first plurality of data ports transmitting and receiving data at a first data rate; a second data port interface, said second data port interface supporting a second plurality of data ports transmitting and receiving data at a second data rate; a CPU interface, said CPU interface configured to communicate with a CPU; an internal memory, said internal memory communicating with said first data port interface and said at least one second data port interface; a memory management unit, said memory management unit including an external memory interface for communicating data from at least one of said first data port interface and said second data port interface and an external memory; a communication channel, said communication channel for communicating data and messaging information between said first data port interface, said second data port interface, said CPU interface, said internal memory, and said memory management unit, wherein one data port interface of said first data port interface and said second data port interface includes a head-of-line blocking prevention mechanism, said head-of-line blocking prevention mechanism including determination means for determining when head-of-line blocking is occurring based upon cell based and packet based thresholds.
Claim 2
Dependent Claim
212 words
A network switch for network communications, said network switch comprising: a first data port interface, said first data port interface supporting a first plurality of data ports transmitting and receiving data at a first data rate; a second data port interface, said second data port interface supporting a second plurality of data ports transmitting and receiving data at a second data rate; a CPU interface, said CPU interface configured to communicate with a CPU; an internal memory, said internal memory communicating with said first data port interface and said at least one second data port interface; a memory management unit, said memory management unit including an external memory interface for communicating data from at least one of said first data port interface and said second data port interface and an external memory; a communication channel, said communication channel for communicating data and messaging information between said first data port interface, said second data port interface, said CPU interface, said internal memory, and said memory management unit, wherein one data port interface of said first data port interface and said second data port interface includes a head-of-line blocking prevention mechanism, said head-of-line blocking prevention mechanism including determination means for determining when head-of-line blocking is occurring based upon cell based and packet based thresholds.
Claim 3
Dependent Claim
86 words
A network switch as recited in claim 1, wherein said head-of-line blocking prevention mechanism further includes a communication means for communicating an occurrence of head-of-line blocking by sending a message to an ingress port of the one data port interface, said communication means sending the message if one threshold of the cell-based thresholds and packet-based thresholds is exceeded, said mechanism also including deactivating means for deactivating a congested port at which the head-of-line blocking occurs, with respect to packets or cells destined for the congested port.
Claim 4
Dependent Claim
24 words
A network switch as recited in claim 1, wherein the packet based thresholds are provided on a per port per class of service basis.
Claim 5
Dependent Claim
58 words
A network switch as recited in claim 1, wherein said head-of-line blocking prevention mechanism includes an output queue for each data port of the plurality of data ports, said output queue including a high threshold and a low threshold, and wherein said mechanism is configured to deactivate a corresponding port when the output queue hits the high threshold.
Claim 6
Dependent Claim
25 words
A network switch as recited in claim 4, wherein said high threshold and said low threshold of said output queue are based upon cell count.
Claim 7
Dependent Claim
27 words
A network switch as recited in claim 4, wherein said high threshold and said low threshold are based upon class of service per port for each packet.
Claim 8
Dependent Claim
41 words
A network switch as recited in claim 4, wherein a plurality of high thresholds and a plurality of low thresholds are provided, said high thresholds including cell-based and packet-based high thresholds, and said low thresholds including cell-based and packet-based low thresholds.
Claim 9
Dependent Claim
35 words
A network switch as recited in claim 1, wherein said memory management unit includes an internal memory counter and an external memory counter for counting data cells in the internal memory and the external memory.
Claim 10
Dependent Claim
33 words
A network switch as recited in claim 4, wherein said mechanism is configured to maintain the port in the deactivated state until a level of the output queue goes below the low threshold.
Claim 11
Dependent Claim
38 words
A network switch as recited in claim 4, wherein when said output queue goes above the high threshold, the one of the first and second data ports sends a message on said communication channel to deactivate the port.
Claim 12
Dependent Claim
41 words
A network switch as recited in claim 4, further comprising an active port register for maintaining a list of active ports, with the head-of-line locking prevention mechanism activating and deactivating ports by setting and unsetting bits in the active port register.
Claim 13
Dependent Claim
37 words
A network switch as recited in claim 1, further comprising a priority assignment unit for assigning a weighted priority value to untagged packets entering one of the first data port interface and the second data port interface.
Claim 14
Dependent Claim
44 words
A network switch as recited in claim 4, said network switch further comprising an active port register, said active port register including fields identifying which of the plurality of data ports are active, and which of the plurality of data ports have been deactivated.
Claim 15
Dependent Claim
102 words
A network switch as recited in claim 1, wherein said head-of-line blocking prevention mechanism includes an output queue for each data port of the plurality of data ports, said output queue including a first high threshold and a first low threshold, said first high and low thresholds being based upon cell count, and a second high threshold and a second low threshold, said second high and low thresholds corresponding to packets on a per class of service per port basis, said mechanism being configured to deactivate a corresponding port when the output queue hits one of the first and second high thresholds.
Claim 16
Dependent Claim
57 words
A network switch as recited in claim 14, wherein said mechanism is configured to maintain the port in the deactivated state until a level of the output queue goes below a corresponding low threshold, said corresponding low threshold being either of the first and second low thresholds which corresponds to the exceeded first or second high thresholds.
Claim 17
Independent Claim
150 words
A method of preventing head-of-line blocking in a network switch, said method comprising: setting a first high watermark and a first low watermark in an output queue of a port, said first high watermark and said first low watermark being based on a cell count; setting a second high watermark and a second low watermark in the output queue of the port, said second high watermark and said second low watermark being based upon packets; sending a status notification message on a communication channel when one of the first and second high watermarks are reached, indicating a congested port; updating an active port register deactivating the congested port when the status notification message is received; and dropping all packets destined for the congested port from other source ports when the congested port has been deactivated, thereby enabling packets to other destination ports to be sent by the other source ports.
Claim 18
Independent Claim
150 words
A method of preventing head-of-line blocking in a network switch, said method comprising: setting a first high watermark and a first low watermark in an output queue of a port, said first high watermark and said first low watermark being based on a cell count; setting a second high watermark and a second low watermark in the output queue of the port, said second high watermark and said second low watermark being based upon packets; sending a status notification message on a communication channel when one of the first and second high watermarks are reached, indicating a congested port; updating an active port register deactivating the congested port when the status notification message is received; and dropping all packets destined for the congested port from other source ports when the congested port has been deactivated, thereby enabling packets to other destination ports to be sent by the other source ports.
Claim 19
Dependent Claim
78 words
A method as recited in claim 16, said method further comprising: determining when the output queue goes below the first or second low watermark corresponding to the one of the first and second high watermarks; sending a status notification message on the communication channel indicating the output queue dropping below the corresponding low watermark; updating the active port register to reactivate the congested port, thereby enabling a formerly congested port to receive packets from the other source ports.
Claim 20
Dependent Claim
61 words
A method as recited in claim 16, wherein setting the second high watermark and the second low watermark in the output queue includes setting a high watermark and a low watermark for each one of a plurality of classes-of-service of packets coming into the network switch, thereby providing a per port per class-of-service head-of-line blocking prevention mechanism for the network switch.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2003-11-28 | 2004-05-29 | 2004-11-28 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2007-11-28 | 2008-05-29 | 2008-11-28 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2011-11-28 | 2012-05-29 | 2012-11-28 | $7700.00 | Window Closed / Lapsed |