Field effect transistor

Claim 1

A field effect transistor comprising: a semi-insulating semiconductor substrate; an epitaxial, layered structure on said substrate and having a recess therein at a region in which a gate is to be formed, said layered structure comprising an impurity doped top layer and an undoped layer directly beneath said top layer, said recess extending completely through said top layer and into, but not through, said undoped layer; a gate base layer formed directly on portions of said top layer and said undoped layer exposed in said recess, said gate base layer comprising one of an InP layer and a plurality of layers including an InP layer, wherein a portion of said gate base layer extends beyond a periphery of said recess and is directly on a top surface of said top layer adjacent to said recess; a gate electrode formed on said gate base layer; and source and drain electrodes that are directly on the top surface of said top layer and separated from said portion of said gate base layer that is directly on the top surface.