Patent US6141675A successfully refreshed from Google Patents.
US6141675A
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Method and apparatus for custom operations
Assignee: US Philips Corp
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Filing: 1996-08-30
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Granted: 2000-10-31
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Expires: 2016-08-30
Abstract
Abstract Custom operations are useable in processor systems for performing functions including multimedia functions. These custom operations enhance a system, such as PC system, to provide real-time multimedia capabilities while maintaining advantages of a special-purpose, embedded solution, i.e., low cost and chip count, and advantages of a general-purpose processor reprogramability. These custom operations work in a computer system which supplies input data having at least two operand data, performs operations on the operand data, and supplies result data to a destination register.
Inventors
- 👤 Gerrit Ary Slavenburg
- 👤 Pieter van der Muelen
- 👤 Yong H. Cho
- 👤 Vijay K. Mehra
- 👤 Yen C. Lee
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-09 10:20
CPC Classifications
G; G06; G06T; G06T1/00; G06T1/20; G06F; G06F15/00; G06F15/76; G06F15/78; G06F15/7828; G06F15/7832; G06F17/00; G06F17/10; G06F9/00; G06F9/06; G06F9/30; G06F9/30003; G06F9/30007; G06F9/3001; G06F9/30014; G06F9/30025; G06F9/30036; G06F9/30038; G06F9/30072; G06F9/38; G06F9/3885
Claims Analysis
Total Claims: 18
Claim 1
Independent Claim
163 words
A method of compiling instructions for a processor, said processor being a very-long-instruction-word processor, wherein said processor comprises: a plurality of input registers, each respective one thereof being capable of supplying a respective one of a plurality of input data of M bits wide; and a destination register capable of storing output data of M bits wide; and wherein the method comprises: determining a set of operations for being executed in parallel by the processor on the plurality of input data, the set of operations include at least one multimedia-specific operation; determining that at least a specific one of the input data comprises specific multiple operand data, each N bits wide, wherein N is smaller than M; determining that the specific multiple operand data be supplied via a specific one of the input registers; and determining that a result per operation involving any of the N bit wide operand data be stored in the destination register as an N bit wide output data.
Claim 2
Independent Claim
163 words
A method of compiling instructions for a processor, said processor being a very-long-instruction-word processor, wherein said processor comprises: a plurality of input registers, each respective one thereof being capable of supplying a respective one of a plurality of input data of M bits wide; and a destination register capable of storing output data of M bits wide; and wherein the method comprises: determining a set of operations for being executed in parallel by the processor on the plurality of input data, the set of operations include at least one multimedia-specific operation; determining that at least a specific one of the input data comprises specific multiple operand data, each N bits wide, wherein N is smaller than M; determining that the specific multiple operand data be supplied via a specific one of the input registers; and determining that a result per operation involving any of the N bit wide operand data be stored in the destination register as an N bit wide output data.
Claim 3
Dependent Claim
108 words
The method of claim 1, wherein said specific one of the input data comprises first and second operand data of N bits each, and another of said input data comprises third and fourth operand data of N bits each; and the determining the set of operations comprises: adding the first and third operand data to produce a first result of N bits and adding the second and fourth operand data to produce a second result of N bits; clipping each respective result into a specified range to produce respective clipped results, each clipped result being N bits; and storing together the respective clipped results in said destination register.
Claim 4
Dependent Claim
81 words
The method of claim 1, wherein said specific one of the input data comprises two operand data of N bits each; and the determining the set of operations comprises: computing an absolute value of each of the two operand data, each computation producing a respective absolute value of N bits; clipping each respective absolute value into a specified range to produce respective clipped results, each clipped result being N bits; and storing the respective clipped results together in said destination register.
Claim 5
Dependent Claim
111 words
The method of claim 1, wherein said specific one of the input data comprises first and second operand data of N bits each, and another of said input data comprises third and fourth operand data of N bits each; and the determining the set of operations comprises: multiplying the first and third operand data to produce a first product and multiplying the second and fourth operand data to produce a second product, the first and second products each comprising N bits; clipping each respective product into a specified range to produce respective clipped results, each clipped result comprising N bits; and storing the respective clipped results together in said destination register.
Claim 6
Dependent Claim
121 words
The method of claim 1, wherein said specific one of the input data comprises first and second operand data of N bits each, and another of said input data comprises third and fourth operand data of N bits each; and the determining the set of operations comprises: subtracting the first operand data from the third operand data to produce a first difference and subtracting the second operand data from the fourth operand data to produce a second difference, the first and second differences each comprising N bits; clipping the first difference and the second difference into a specified range to produce respective clipped results, each clipped result comprising N bits; and storing the respective clipped results together in said destination register.
Claim 7
Dependent Claim
184 words
A computer program for execution on a computer with a processor, said processor being a very-long-instruction-word processor, wherein said processor comprises: a plurality of input registers, each respective one thereof being capable of supplying a respective one of a plurality of input data of M bits wide; and a destination register capable of storing output data of M bits wide; at least a specific one of the input data comprising specific multiple operand data, each N bits wide, wherein N is smaller than M; and wherein the program comprises instructions for a set of operations for execution in parallel by the processor on the plurality of input data, the set of operations include at least one multimedia-specific operation, the instructions comprising: loading the specific multiple operand data, each N bits wide, in a specific one of the input registers; and storing a result per operation involving any of the N bit wide operand data in the destination register as an N bit wide output data, clipped results, each clipped result being N bits; and storing together the respective clipped results in said destination register.
Claim 8
Dependent Claim
184 words
A computer program for execution on a computer with a processor, said processor being a very-long-instruction-word processor, wherein said processor comprises: a plurality of input registers, each respective one thereof being capable of supplying a respective one of a plurality of input data of M bits wide; and a destination register capable of storing output data of M bits wide; at least a specific one of the input data comprising specific multiple operand data, each N bits wide, wherein N is smaller than M; and wherein the program comprises instructions for a set of operations for execution in parallel by the processor on the plurality of input data, the set of operations include at least one multimedia-specific operation, the instructions comprising: loading the specific multiple operand data, each N bits wide, in a specific one of the input registers; and storing a result per operation involving any of the N bit wide operand data in the destination register as an N bit wide output data, clipped results, each clipped result being N bits; and storing together the respective clipped results in said destination register.
Claim 9
Dependent Claim
107 words
The computer program of claim 6, wherein said specific one of the input data comprises first and second operand data of N bits each, and another of said input data comprises third and fourth operand data of N bits each; and wherein the instructions further comprise: adding the first and third operand data to produce a first result of N bits and adding the second and fourth operand data to produce a second result of N bits; clipping each respective result into a specified range to produce respective clipped results, each clipped result being N bits; and storing together the respective clipped results in said destination register.
Claim 10
Dependent Claim
80 words
The computer program of claim 6, wherein said specific one of the input data comprises two operand data of N bits each; and wherein the instructions further comprise: computing an absolute value of each of the two operand data, each computation producing a respective absolute value of N bits; clipping each respective absolute value into a specified range to produce respective clipped results, each clipped result being N bits; and storing the respective clipped results together in said destination register.
Claim 11
Dependent Claim
110 words
The computer program of claim 6, wherein said specific one of the input data comprises first and second operand data of N bits each, and another of said input data comprises third and fourth operand data of N bits each; and wherein the instructions further comprise: multiplying the first and third operand data to produce a first product and multiplying the second and fourth operand data to produce a second product, the first and second products each comprising N bits; clipping each respective product into a specified range to produce respective clipped results, each clipped result comprising N bits; and storing the respective clipped results together in said destination register.
Claim 12
Dependent Claim
120 words
The computer program of claim 6, wherein said specific one of the input data comprises first and second operand data of N bits each, and another of said input data comprises third and fourth operand data of N bits each; and wherein the instructions further comprise: subtracting the first operand data from the third operand data to produce a first difference and subtracting the second operand data from the fourth operand data to produce a second difference, the first and second differences each comprising N bits; clipping the first difference and the second difference into a specified range to produce respective clipped results, each clipped result comprising N bits; and storing the respective clipped results together in said destination register.
Claim 13
Independent Claim
160 words
A method of executing a computer program on a processor, said processor being a very-long-instruction-word processor, wherein said processor comprises: a plurality of input registers, each respective one thereof being capable of supplying a respective one of a plurality of input data of M bits wide; and a destination register capable of storing output data of M bits wide; wherein at least a specific one of the input data comprises specific multiple operand data, each N bits wide, wherein N is smaller than M; and the processor is capable of executing a set of operations in parallel on the plurality of input data, the set of operations include at least one multimedia-specific operation; the method comprising: loading the specific multiple operand data, each N bits wide, in a specific one of the input registers; and storing a result per operation involving any of the N bit wide operand data in the destination register as an N bit wide output data.
Claim 14
Independent Claim
160 words
A method of executing a computer program on a processor, said processor being a very-long-instruction-word processor, wherein said processor comprises: a plurality of input registers, each respective one thereof being capable of supplying a respective one of a plurality of input data of M bits wide; and a destination register capable of storing output data of M bits wide; wherein at least a specific one of the input data comprises specific multiple operand data, each N bits wide, wherein N is smaller than M; and the processor is capable of executing a set of operations in parallel on the plurality of input data, the set of operations include at least one multimedia-specific operation; the method comprising: loading the specific multiple operand data, each N bits wide, in a specific one of the input registers; and storing a result per operation involving any of the N bit wide operand data in the destination register as an N bit wide output data.
Claim 15
Dependent Claim
106 words
The method of claim 11, wherein said specific one of the input data comprises first and second operand data of N bits each, and another of said input data comprises third and fourth operand data of N bits each; and wherein the method further comprises: adding the first and third operand data to produce a first result of N bits and adding the second and fourth operand data to produce a second result of N bits; clipping each respective result into a specified range to produce respective clipped results, each clipped result being N bits; and storing together the respective clipped results in said destination register.
Claim 16
Dependent Claim
79 words
The method of claim 11, wherein said specific one of the input data comprises two operand data of N bits each; and wherein the instructions further comprise: computing an absolute value of each of the two operand data, each computation producing a respective absolute value of N bits; clipping each respective absolute value into a specified range to produce respective clipped results, each clipped result being N bits; and storing the respective clipped results together in said destination register.
Claim 17
Dependent Claim
109 words
The method of claim 11, wherein said specific one of the input data comprises first and second operand data of N bits each, and another of said input data comprises third and fourth operand data of N bits each; and wherein the method further comprises: multiplying the first and third operand data to produce a first product and multiplying the second and fourth operand data to produce a second product, the first and second products each comprising N bits; clipping each respective product into a specified range to produce respective clipped results, each clipped result comprising N bits; and storing the respective clipped results together in said destination register.
Claim 18
Dependent Claim
119 words
The method of claim 11, wherein said specific one of the input data comprises first and second operand data of N bits each, and another of said input data comprises third and fourth operand data of N bits each; and wherein the method further comprises: subtracting the first operand data from the third operand data to produce a first difference and subtracting the second operand data from the fourth operand data to produce a second difference, the first and second differences each comprising N bits; clipping the first difference and the second difference into a specified range to produce respective clipped results, each clipped result comprising N bits; and storing the respective clipped results together in said destination register.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2003-10-31 | 2004-05-01 | 2004-10-31 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2007-10-31 | 2008-05-01 | 2008-10-31 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2011-10-31 | 2012-05-01 | 2012-10-31 | $7700.00 | Window Closed / Lapsed |