Patent US6140241A successfully refreshed from Google Patents.
US6140241A
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Multi-step electrochemical copper deposition process with improved filling capability
Assignee: Taiwan Semiconductor Manufacturing Co TSMC Ltd
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Filing: 1999-03-18
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Granted: 2000-10-31
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Expires: 2019-03-18
Abstract
Abstract A multi-step electrochemical method for forming a copper metallurgy on an integrated circuit which has high aspect ratio contact/via openings is described. The method is designed to give good coverage and gap filling capability as well as high production throughput by performing the electrochemical deposition of copper in two deposition stages with an dwell period between the stages. The process utilizes a copper plating electrolyte which contains an added brightener and leveler. The first deposition is done at a low current density which provides good coverage resulting from a high throwing power. The high aspect ratio contact/via openings are covered with a substantial thickness of a uniform, high quality copper coating. During the deposition, the concentration of brightener becomes depleted in the base region of high aspect ratio contacts or vias. The concentration of brighteners, is replenished in these regions by diffusion during a brief dwell period wherein the plating current is stopped. Next, a high current density is applied whereby the contact/vias are filled and additional copper is deposited over them at a high deposition rate. The greatest throughput benefits are realized, by way of the high current density step, when the process is applied to the formation of a dual damascene metallurgy.
Inventors
- 👤 Shau-Lin Shue
- 👤 Ming-Hsing Tsai
- 👤 Wen-Jye Tsai
- 👤 Chen-Hua Yu
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-04 16:01
CPC Classifications
H; H10; H10W; H10W20/00; H10W20/01; H10W20/031; H10W20/056; H10P; H10P14/00; H10P14/40; H10P14/46; H10P14/47
Claims Analysis
Total Claims: 26
Claim 1
Independent Claim
181 words
A method for forming a copper plug contact to a semiconductor wafer comprising: (a) providing a semiconductor wafer; (b) depositing an insulative layer on said semiconductor wafer; (c) forming an opening in said insulative layer, thereby exposing a region of said semiconductor wafer; (d) forming a barrier layer on said insulative layer and within said opening; (e) depositing a copper seed layer on said barrier layer; (f) placing said wafer in an electrolyte containing copper salts and a brightener additive; (g) providing agitation of said electrolyte; (h) depositing a first layer of copper on said wafer by applying current at a first current density for a first time period; (i) discontinuing said current for a second time period while maintaining said agitation; (j) depositing a second layer of copper on said wafer by applying current at a second current density for a third time period, said third time period being sufficient to fill said opening with deposited copper; and (k) polishing the surface of said wafer to expose said insulative layer adjacent to said opening thereby forming a copper plug contact.
Claim 2
Independent Claim
181 words
A method for forming a copper plug contact to a semiconductor wafer comprising: (a) providing a semiconductor wafer; (b) depositing an insulative layer on said semiconductor wafer; (c) forming an opening in said insulative layer, thereby exposing a region of said semiconductor wafer; (d) forming a barrier layer on said insulative layer and within said opening; (e) depositing a copper seed layer on said barrier layer; (f) placing said wafer in an electrolyte containing copper salts and a brightener additive; (g) providing agitation of said electrolyte; (h) depositing a first layer of copper on said wafer by applying current at a first current density for a first time period; (i) discontinuing said current for a second time period while maintaining said agitation; (j) depositing a second layer of copper on said wafer by applying current at a second current density for a third time period, said third time period being sufficient to fill said opening with deposited copper; and (k) polishing the surface of said wafer to expose said insulative layer adjacent to said opening thereby forming a copper plug contact.
Claim 3
Dependent Claim
35 words
The method of claim 1 wherein said barrier layer is selected from the group consisting of TaN, TiN, Ta, a layer of TaN over Ta, a layer of TiN over Ti, and WN X .
Claim 4
Dependent Claim
12 words
The method of claim 1 wherein said electrolyte contains a leveler additive.
Claim 5
Dependent Claim
20 words
The method of claim 1 wherein said electrolyte is maintained at a temperature of between about 21 and 27° C.
Claim 6
Dependent Claim
19 words
The method of claim 1 wherein said first current density is between about 1.6 and 7.0 mA./cm 2 .
Claim 7
Dependent Claim
19 words
The method of claim 1 wherein said second current density is between about 9.5 and 25 mA/cm 2 .
Claim 8
Dependent Claim
17 words
The method of claim 1 wherein said second time period is between about 1 and 10 seconds.
Claim 9
Dependent Claim
13 words
The method of claim 1 wherein said agitation is accomplished by mechanical stirring.
Claim 10
Dependent Claim
15 words
The method of claim 1 wherein said agitation is accomplished by mechanical stirring and ultrasound.
Claim 11
Dependent Claim
20 words
The method of claim 1 wherein said barrier layer and said copper seed layer are sequentially deposited by IMP sputtering.
Claim 12
Dependent Claim
17 words
The method of claim 1 wherein said barrier layer is between about 150 and 450 Angstroms thick.
Claim 13
Dependent Claim
18 words
The method of claim 1 wherein said copper seed layer is between about 500 and 2,500 Angstroms thick.
Claim 14
Independent Claim
215 words
A method for forming a dual damascene copper interconnect metallurgy on an integrated circuit wafer comprising: (a) providing an integrated circuit wafer; (b) depositing an insulative layer on said semiconductor wafer; (c) patterning a via openings and grooves which define an interconnection metallurgy in said insulative layer; (d) depositing a barrier layer on said insulative layer; (e) depositing a copper seed layer on said barrier layer; (f) placing said wafer in an electrolyte containing copper salts and a brightener additive; (g) applying agitation to said electrolyte; (h) depositing a first layer of copper on said wafer by applying current at a first current density for a first time period; (i) discontinuing said current for a second time period while maintaining said agitation; (j) depositing a second layer of copper on said wafer by applying current at a second current density for a third time period, said third time period being sufficient to fill said via openings and said grooves with copper to a level which lies above the plane of said barrier layer adjacent to said grooves and said via openings; and (k) polishing away portions of said copper and said barrier layer which lie on the surface of said wafer adjacent to said grooves and said via openings thereby forming a copper interconnection metallurgy.
Claim 15
Independent Claim
215 words
A method for forming a dual damascene copper interconnect metallurgy on an integrated circuit wafer comprising: (a) providing an integrated circuit wafer; (b) depositing an insulative layer on said semiconductor wafer; (c) patterning a via openings and grooves which define an interconnection metallurgy in said insulative layer; (d) depositing a barrier layer on said insulative layer; (e) depositing a copper seed layer on said barrier layer; (f) placing said wafer in an electrolyte containing copper salts and a brightener additive; (g) applying agitation to said electrolyte; (h) depositing a first layer of copper on said wafer by applying current at a first current density for a first time period; (i) discontinuing said current for a second time period while maintaining said agitation; (j) depositing a second layer of copper on said wafer by applying current at a second current density for a third time period, said third time period being sufficient to fill said via openings and said grooves with copper to a level which lies above the plane of said barrier layer adjacent to said grooves and said via openings; and (k) polishing away portions of said copper and said barrier layer which lie on the surface of said wafer adjacent to said grooves and said via openings thereby forming a copper interconnection metallurgy.
Claim 16
Dependent Claim
35 words
The method of claim 13 wherein said barrier layer is selected from the group consisting of TaN, TiN, Ta, a layer of TaN on Ta, a layer of TiN on Ti, and WN X .
Claim 17
Dependent Claim
12 words
The method of claim 13 wherein said electrolyte contains a leveler additive.
Claim 18
Dependent Claim
20 words
The method of claim 13 wherein said electrolyte is maintained at a temperature of between about 21 and 27° C.
Claim 19
Dependent Claim
19 words
The method of claim 13 wherein said first current density is between about 1.6 and 7.0 mA./cm 2 .
Claim 20
Dependent Claim
19 words
The method of claim 13 wherein said second current density is between about 9.5 and 25 mA./cm 2 .
Claim 21
Dependent Claim
17 words
The method of claim 13 wherein said second time period is between about 1 and 10 seconds.
Claim 22
Dependent Claim
13 words
The method of claim 13 wherein said agitation is accomplished by mechanical stirring.
Claim 23
Dependent Claim
15 words
The method of claim 13 wherein said agitation is accomplished by mechanical stirring and ultrasound.
Claim 24
Dependent Claim
20 words
The method of claim 13 wherein said barrier layer and said copper sewed layer are sequentially deposited by IMP sputtering.
Claim 25
Dependent Claim
17 words
The method of claim 13 wherein said barrier layer is between about 150 and 450 Angstroms thick.
Claim 26
Dependent Claim
18 words
The method of claim 13 wherein said copper seed layer is between about 500 and 2,500 Angstroms thick.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2003-10-31 | 2004-05-01 | 2004-10-31 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2007-10-31 | 2008-05-01 | 2008-10-31 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2011-10-31 | 2012-05-01 | 2012-10-31 | $7700.00 | Window Closed / Lapsed |