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US6134707A Expired / Lapsed US ⏱️ 0.0 years remaining

Apparatus and method for in-system programming of integrated circuits containing programmable elements

Assignee: Altera Corp
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Filing: 1997-06-10
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Granted: 2000-10-17
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Expires: 2017-06-10
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Abstract

Abstract An apparatus and method for in-system programming of programmable devices includes a device configuration program with adaptive programming source code instructions that characterize device configuration instructions and data. The adaptive source code instructions may include conditional branches, subroutines, variables, configurable arrays, integer operators, and Boolean operators. These features allow for more compact and efficient device configuration instructions and data. An interpreter converts the device configuration program into formatted device configuration instructions and data. The formatted device configuration instructions and data are preferably compatible with IEEE 1149.1 JTAG-BST specifications. The formatted device configuration instructions and data are used to program a programmable device in the manner specified by the adaptive programming source code instructions.

Inventors

  • 👤 Alan L. Herrmann
  • 👤 Timothy J. Southgate

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-08 00:52
CPC Classifications
G; G06; G06F; G06F30/00; G06F30/30; G06F30/34

Claims Analysis

Total Claims: 27
Claim 1
Independent Claim 113 words
A computer readable memory to direct a programmable logic device controller to generate controls signals to program a programmable device in a specified manner, comprising: executable instructions stored in said memory, said executable instructions including a programmable logic device configuration program including adaptive programming language source code instructions that characterize programmable logic device configuration instructions and data; and an interpreter to convert said programmable logic device configuration program into formatted programmable logic device configuration instructions and data for processing by said programmable logic device controller such that said programmable logic device controller applies controls signals that program said programmable logic device in a manner specified by said adaptive programming language source code instructions.
Claim 2
Dependent Claim 113 words
A computer readable memory to direct a programmable logic device controller to generate controls signals to program a programmable device in a specified manner, comprising: executable instructions stored in said memory, said executable instructions including a programmable logic device configuration program including adaptive programming language source code instructions that characterize programmable logic device configuration instructions and data; and an interpreter to convert said programmable logic device configuration program into formatted programmable logic device configuration instructions and data for processing by said programmable logic device controller such that said programmable logic device controller applies controls signals that program said programmable logic device in a manner specified by said adaptive programming language source code instructions.
Claim 3
Dependent Claim 16 words
The apparatus of claim 1 wherein said adaptive programming language source code instructions include conditional branches.
Claim 4
Dependent Claim 15 words
The apparatus of claim 1 wherein said adaptive programming language source code instructions include subroutines.
Claim 5
Dependent Claim 15 words
The apparatus of claim 1 wherein said adaptive programming language source code instructions include variables.
Claim 6
Dependent Claim 16 words
The apparatus of claim 1 wherein said adaptive programming language source code instructions include configurable arrays.
Claim 7
Dependent Claim 18 words
The apparatus of claim 1 wherein said adaptive programming language source code instructions include integer and Boolean operators.
Claim 8
Dependent Claim 19 words
The apparatus of claim 1 wherein said device configuration program is at least partially stored in a compressed format.
Claim 9
Dependent Claim 17 words
The apparatus of claim 1 wherein said device configuration program is generated with integrated circuit programming software.
Claim 10
Dependent Claim 22 words
The apparatus of claim 1 wherein said formatted programmable logic device configuration instructions and data are compatible with IEEE 1149.1 JTAG-BST specifications.
Claim 11
Dependent Claim 22 words
The apparatus of claim 1 wherein said interpreter includes instructions to perform a cyclic redundancy check operation on said device configuration program.
Claim 12
Dependent Claim 21 words
The apparatus of claim 1 wherein said interpreter facilitates the implementation of specified real time delays in said programmable logic device.
Claim 13
Dependent Claim 19 words
The apparatus of claim 1 wherein said interpreter is stored in a memory of said programmable logic device controller.
Claim 14
Dependent Claim 23 words
The apparatus of claim 1 wherein said device configuration program and said interpreter are stored in the memory of a general purpose computer.
Claim 15
Dependent Claim 25 words
The apparatus of claim 1 wherein said programmable logic device controller is selected from the group including an embedded controller, a microprocessor, and a computer.
Claim 16
Dependent Claim 49 words
A computer readable memory, comprising: executable instructions stored in said memory, said executable instructions including a programmable logic device configuration program including adaptive programming language source code instructions that characterize programmable logic device configuration instructions and data for use in generating control signals that program a programmable logic device.
Claim 17
Dependent Claim 49 words
A computer readable memory, comprising: executable instructions stored in said memory, said executable instructions including a programmable logic device configuration program including adaptive programming language source code instructions that characterize programmable logic device configuration instructions and data for use in generating control signals that program a programmable logic device.
Claim 18
Dependent Claim 25 words
The apparatus of claim 15 wherein said adaptive programming language source code instructions include conditional branches, subroutines, variables, configurable arrays, integer operators, and Boolean operators.
Claim 19
Dependent Claim 60 words
The apparatus of claim 16 further comprising: a circuit with an interpreter to process said programmable logic device configuration program; a programmable logic device, connected to said circuit, for programming in accordance with said programmable logic device configuration program; a system bus connected to said programmable logic device; and a plurality of sub-system functional elements connected to said system bus.
Claim 20
Dependent Claim 60 words
A computer readable memory, comprising: executable instructions stored in said memory, said executable instructions including an interpreter to convert a programmable logic device configuration program with adaptive programming language source code instructions into formatted programmable logic device configuration instructions and data that are used by a programmable logic device controller to generate control signals that program a programmable logic device.
Claim 21
Dependent Claim 60 words
A computer readable memory, comprising: executable instructions stored in said memory, said executable instructions including an interpreter to convert a programmable logic device configuration program with adaptive programming language source code instructions into formatted programmable logic device configuration instructions and data that are used by a programmable logic device controller to generate control signals that program a programmable logic device.
Claim 22
Dependent Claim 22 words
The apparatus of claim 18 wherein said formatted programmable logic device configuration instructions and data are compatible with IEEE 1149.1 JTAG-BST specifications.
Claim 23
Dependent Claim 60 words
The apparatus of claim 18 further comprising: a circuit storing said interpreter and processing said programmable logic device configuration program; a programmable logic device, connected to said circuit, for programming in accordance with said programmable logic device configuration program; a system bus connected to said programmable logic device; and a plurality of sub-system functional elements connected to said system bus.
Claim 24
Independent Claim 82 words
A method of programming a programmable logic device, said method comprising the steps of: generating a programmable logic device configuration program including adaptive programming language source code instructions that characterize programmable logic device configuration instructions and data; interpreting said programmable logic device configuration program to yield formatted programmable logic device configuration instructions and data; deriving programmable logic device control signals corresponding to said formatted programmable logic device configuration instructions; and programming a programmable logic device with said programmable logic device control signals.
Claim 25
Independent Claim 82 words
A method of programming a programmable logic device, said method comprising the steps of: generating a programmable logic device configuration program including adaptive programming language source code instructions that characterize programmable logic device configuration instructions and data; interpreting said programmable logic device configuration program to yield formatted programmable logic device configuration instructions and data; deriving programmable logic device control signals corresponding to said formatted programmable logic device configuration instructions; and programming a programmable logic device with said programmable logic device control signals.
Claim 26
Dependent Claim 32 words
The method of claim 21 wherein said generating step includes the step of generating adaptive programming language source code instructions with conditional branches, subroutines, variables, configurable arrays, integer operators and Boolean operators.
Claim 27
Dependent Claim 30 words
The method of claim 22 wherein said interpreting step includes the step of yielding formatted programmable logic device configuration instructions and data that are compatible with IEEE 1149.1 JTAG-BST specifications.

References Cited (Backward Citations)

US5498979A Cited
US5426378A Cited
US5633813A Cited
US5737631A Cited
US5748979A Cited
US5752035A Cited
US5949987A Cited
US5815405A Cited
US5946219A Cited
US5971595A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 2003-10-17 2004-04-17 2004-10-17 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2007-10-17 2008-04-17 2008-10-17 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2011-10-17 2012-04-17 2012-10-17 $7700.00 Window Closed / Lapsed

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