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US6097207A
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Robust domino circuit design for high stress conditions
Assignee: International Business Machines Corp
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Filing: 1998-08-21
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Granted: 2000-08-01
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Expires: 2018-08-21
Abstract
Abstract A domino circuit design for handling high stress conditions. The domino logic circuit includes a programmable mechanism for choosing whether the circuit is operating during normal operations or during a stress test, such as a burn-in procedure. In particular, the circuit includes a dual purpose transistor that is controllable by either a precharge signal or an output signal, and includes a mechanism for selecting whether the precharge signal or the output signal is to control the gate input of the dual purpose transistor. Accordingly, the dual purpose transistor will either act in parallel with the precharge device, or a keeper device depending on the mode of operation chosen.
Inventors
- 👤 Kerry Bernstein
- 👤 Norman J. Rohrer
- 👤 Jeffrey S. Zimmerman
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-08 23:19
CPC Classifications
H; H03; H03K; H03K19/00; H03K19/02; H03K19/08; H03K19/094; H03K19/096; H03K19/0963
Claims Analysis
Total Claims: 16
Claim 1
Independent Claim
47 words
A domino logic circuit, comprising: a dual purpose transistor coupled to a precharge node and having a gate input controllable by either a precharge signal or an output signal; and a mechanism for selecting either the precharge signal or the output signal to control the gate input.
Claim 2
Dependent Claim
47 words
A domino logic circuit, comprising: a dual purpose transistor coupled to a precharge node and having a gate input controllable by either a precharge signal or an output signal; and a mechanism for selecting either the precharge signal or the output signal to control the gate input.
Claim 3
Dependent Claim
18 words
The domino logic circuit of claim 1, wherein the selecting mechanism comprises a PFET and an NFET transistor.
Claim 4
Dependent Claim
23 words
The domino logic circuit of claim 2, wherein the PFET and NFET transistors have a gate input controlled by an external control signal.
Claim 5
Dependent Claim
61 words
The domino logic circuit of claim 1, further comprising: a precharge transistor coupled to the precharge node and controllable by the precharge signal; a keeper transistor coupled to the precharge node and controllable by the output signal; and wherein the select mechanism causes the dual purpose transistor to either operate in parallel with the precharge transistor or with the keeper transistor.
Claim 6
Dependent Claim
30 words
The domino logic circuit of claim 4, wherein the parallel configuration of the dual purpose transistor with the precharge transistor causes the domino circuit to be configured for normal operations.
Claim 7
Dependent Claim
30 words
The domino logic circuit of claim 4, wherein the parallel configuration of the dual purpose transistor with the keeper transistor causes the domino circuit to be configured for burn-in operations.
Claim 8
Dependent Claim
63 words
A domino circuit, comprising: a precharge node; a precharge device for charging the precharge node, said precharge device controlled by a precharge signal; a keeper device for charging the precharge node, said keeper device controlled by an output signal; and a dual purpose device for charging the precharge node, said dual purpose device controllable by either the precharge signal or the output signal.
Claim 9
Dependent Claim
63 words
A domino circuit, comprising: a precharge node; a precharge device for charging the precharge node, said precharge device controlled by a precharge signal; a keeper device for charging the precharge node, said keeper device controlled by an output signal; and a dual purpose device for charging the precharge node, said dual purpose device controllable by either the precharge signal or the output signal.
Claim 10
Dependent Claim
26 words
The domino circuit of claim 7, further comprising: a selection mechanism for selecting either the precharge signal or output signal to control the dual purpose device.
Claim 11
Dependent Claim
28 words
The domino circuit of claim 8, wherein the selection mechanism causes the dual purpose transistor to operate in parallel with either the precharge device or the keeper device.
Claim 12
Dependent Claim
23 words
The domino circuit of claim 9, wherein the dual purpose device is a FET having a gate input coupled to said selection mechanism.
Claim 13
Dependent Claim
26 words
The domino circuit of claim 10, wherein the selection mechanism includes an NFET and a PFET, each having a gate input controlled by a control signal.
Claim 14
Dependent Claim
14 words
The domino circuit of claim 11, wherein the control signal comprises a JTAG signal.
Claim 15
Dependent Claim
76 words
A circuit having a precharge node, comprising: precharge means for charging said precharge node during a precharge phase; keeper means for maintaining said charge on said precharge node during an evaluate phase; dual purpose charging means for acting in parallel with either the precharge means or keeper means to provide additional charge to the precharge node; and switching means for causing said dual purpose charging means to act with either the precharge means or keeper means.
Claim 16
Dependent Claim
76 words
A circuit having a precharge node, comprising: precharge means for charging said precharge node during a precharge phase; keeper means for maintaining said charge on said precharge node during an evaluate phase; dual purpose charging means for acting in parallel with either the precharge means or keeper means to provide additional charge to the precharge node; and switching means for causing said dual purpose charging means to act with either the precharge means or keeper means.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2003-08-01 | 2004-01-31 | 2004-08-01 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2007-08-01 | 2008-01-31 | 2008-08-01 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2011-08-01 | 2012-01-31 | 2012-08-01 | $7700.00 | Window Closed / Lapsed |