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US6096607A
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Method for manufacturing silicon carbide semiconductor device
Assignee: Fuji Electric Co Ltd
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Filing: 1998-08-17
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Granted: 2000-08-01
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Expires: 2018-08-17
Abstract
Abstract A method for manufacturing a silicon carbide semiconductor device having pn junctions is provided wherein a recessed portion is formed in a certain pattern in a surface of a substrate formed of a silicon carbide crystal, and an epitaxial layer having a conductivity type opposite to that of the substrate is grown on the substrate, and the surface of the surface is flattened so that the pn junctions appear on the surface of the substrate.
Inventors
- 👤 Katsunori Ueno
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-09 14:30
CPC Classifications
H; H10; H10D; H10D30/00; H10D30/60; H10D30/64; H10D30/66; H10D12/00; H10D12/01; H10D12/031; H10D30/63; H10D30/635; H10D62/00; H10D62/80; H10D62/83; H10D62/832; H10D62/8325; H10D84/00; H10D84/01; H10D84/0123; H10D84/0126; H10D84/0158; H10D84/0165; H10D84/0193; H10D84/02; H10D84/03; H10D84/035; H10P; H10P50/00; H10D64/00; H10D64/20; H10D64/23; H10D64/251; H10D64/256
Claims Analysis
Total Claims: 15
Claim 1
Independent Claim
82 words
A method for manufacturing a silicon carbide semiconductor device having a pn junction, comprising the steps of: forming a recessed portion in a surface of a semiconductor substrate in a predetermined pattern, said semiconductor substrate comprising a silicon carbide crystal; growing an epitaxial layer on the semiconductor substrate, said epitaxial layer having a conductivity type opposite to that of the semiconductor substrate; and flattening the surface of the semiconductor substrate so that the pn junction appears on the surface of the substrate.
Claim 2
Independent Claim
82 words
A method for manufacturing a silicon carbide semiconductor device having a pn junction, comprising the steps of: forming a recessed portion in a surface of a semiconductor substrate in a predetermined pattern, said semiconductor substrate comprising a silicon carbide crystal; growing an epitaxial layer on the semiconductor substrate, said epitaxial layer having a conductivity type opposite to that of the semiconductor substrate; and flattening the surface of the semiconductor substrate so that the pn junction appears on the surface of the substrate.
Claim 3
Independent Claim
99 words
A method for manufacturing a silicon carbide MOSFET, comprising: forming a recessed portion in a surface of a first conductivity type substrate in a predetermined pattern, said semiconductor substrate comprising a silicon carbide crystal; growing a second conductivity type epitaxial layer on the substrate; and flattening at least a part of the substrate by removing a surface portion of the substrate including a part of the epitaxial layer grown thereon, so that pn junctions appear on a surface of the substrate, and so that the second conductivity type epitaxial layer is formed into a second conductivity type base region.
Claim 4
Independent Claim
99 words
A method for manufacturing a silicon carbide MOSFET, comprising: forming a recessed portion in a surface of a first conductivity type substrate in a predetermined pattern, said semiconductor substrate comprising a silicon carbide crystal; growing a second conductivity type epitaxial layer on the substrate; and flattening at least a part of the substrate by removing a surface portion of the substrate including a part of the epitaxial layer grown thereon, so that pn junctions appear on a surface of the substrate, and so that the second conductivity type epitaxial layer is formed into a second conductivity type base region.
Claim 5
Dependent Claim
205 words
A method for manufacturing a silicon carbide MOSFET according to claim 2, comprising the steps of: covering a portion of the first conductivity type silicon carbide substrate with a mask, and forming the recessed portion to a predetermined depth by etching; growing the second conductivity type epitaxial layer on the substrate; flattening at least a part of the substrate by removing a surface portion of the substrate including a part of the epitaxial layer grown thereon, so that pn junctions appear on the surface of the substrate, and so that the second conductivity type epitaxial layer is formed into a second conductivity type base region; implanting impurities for forming a first conductivity type region in a surface layer of the second conductivity type epitaxial layer; conducting heat treatment to activate the impurities introduced by ion implantation, so as to form a first conductivity type source region; forming an oxide film on a flattened surface of the substrate by thermal oxidation; forming a gate electrode layer on the oxide film; forming a source electrode to be in contact with the first conductivity type source region; and forming a drain electrode to be in contact with a rear surface of the first conductivity type silicon carbide substrate.
Claim 6
Dependent Claim
206 words
A method for manufacturing a silicon carbide MOSFET according to claim 2, comprising the steps of: covering a portion of the first conductivity type silicon carbide substrate with a mask, and forming the recessed portion to a predetermined depth by etching; growing the second conductivity type epitaxial layer on the substrate; implanting impurities for forming a first conductivity type region in a surface layer of the second conductivity type epitaxial layer; flattening at least a part of the substrate by removing a surface portion of the substrate including a part of the epitaxial layer grown thereon, so that the pn junction appears on the surface of the substrate, and so that the second conductivity type epitaxial layer is formed into a second conductivity type base region; conducting heat treatment to activate the impurities introduced by ion implantation, so as to form a first conductivity type source region; forming an oxide film on a flattened surface of the substrate by thermal oxidation; forming a gate electrode layer on the oxide film; forming a source electrode to be in contact with the first conductivity type source region; and forming a drain electrode to be in contact with a rear surface of the first conductivity type silicon carbide substrate.
Claim 7
Dependent Claim
199 words
A method for manufacturing a silicon carbide MOSFET according to claim 2, comprising the steps of: covering a portion of the first conductivity type silicon carbide substrate with a mask, and forming the recessed portion to a predetermined depth by etching; epitaxially growing the second conductivity type epitaxial layer on the substrate; epitaxially growing a first conductivity type high concentration layer on the second conductivity type epitaxial layer; flattening at least a part of the substrate by removing a surface portion of the substrate including a part of the epitaxial layer grown thereon, so that the pn junction appears on the surface of the substrate, and so that the second conductivity type epitaxial layer is formed into a second conductivity type base region while the first conductivity type high concentration layer is formed into a first conductivity type source region; forming an oxide film on a flattened surface of the substrate by thermal oxidation; forming a gate electrode layer on the oxide film; forming a source electrode to be in contact with the first conductivity type source region; and forming a drain electrode to be in contact with a rear surface of the first conductivity type silicon carbide substrate.
Claim 8
Dependent Claim
226 words
A method for manufacturing a silicon carbide MOSFET according to claim 2, comprising the steps of: covering a portion of the first conductivity type silicon carbide substrate with a mask, and forming the recessed portion to a predetermined depth by etching; epitaxially growing the second conductivity type epitaxial layer on the substrate; flattening at least a part of the substrate by removing a surface portion of the substrate including a part of the epitaxial layer grown thereon, so that the pn junction appears on the surface of the substrate, and so that the second conductivity type epitaxial layer is formed into a second conductivity type base region; forming a first conductivity type epitaxial layer on the surface of the substrate; implanting impurities for forming a first conductivity type region in selected portions of a surface layer of the first conductivity type epitaxial layer; conducting heat treatment to activate the impurities introduced by ion implantation, so as to form a first conductivity type source region; forming an oxide film by thermal oxidation on a surface of the first conductivity type epitaxial layer; forming a gate electrode layer on the oxide film; forming a source electrode to be in contact with the first conductivity type source region; and forming a drain electrode to be in contact with a rear surface of the first conductivity type silicon carbide substrate.
Claim 9
Dependent Claim
30 words
A method for manufacturing a silicon carbide MOSFET according to claim 6, wherein said first conductivity type epitaxial layer has a thickness in a range of 0.1 to 1 μm.
Claim 10
Dependent Claim
216 words
A method for manufacturing a silicon carbide MOSFET according to claim 2, comprising the steps of: covering a portion of the first conductivity type silicon carbide substrate with a mask, and forming the recessed portion to a predetermined depth by etching; epitaxially growing the second conductivity type epitaxial layer on the substrate; laminating a first conductivity type high concentration layer by epitaxial growth on the surface of the substrate; flattening at least a part of the substrate by removing a surface portion of the substrate including a part of the epitaxial layer grown thereon, so that the pn junction appears on the surface of the substrate, and so that the second conductivity type epitaxial layer is formed into a second conductivity type base region while the first conductivity type high concentration layer is formed into a first conductivity type source region; laminating a first conductivity type epitaxial layer on the surface of the substrate; forming an oxide film by thermal oxidation on the surface of the first conductivity type epitaxial layer; forming a gate electrode layer on the oxide film; forming a source electrode to be in contact with the first conductivity type source region; and forming a drain electrode to be in contact with a rear surface of the first conductivity type silicon carbide substrate.
Claim 11
Dependent Claim
30 words
A method for manufacturing a silicon carbide MOSFET according to claim 8, wherein said first conductivity type epitaxial layer has a thickness in a range of 0.1 to 1 μm.
Claim 12
Independent Claim
253 words
A method for manufacturing a CMOS semiconductor device, comprising the steps of: covering a portion of a first conductivity type silicon carbide substrate with a mask, and forming a recessed portion to a predetermined depth by etching; growing a second conductivity type epitaxial layer on the substrate; flattening at least a part of the substrate by removing a surface portion of the substrate including a part of the epitaxial layer grown thereon, so that a pn junction appears on the surface of the substrate, and so that the second conductivity type epitaxial layer is formed into a second conductivity type well region; implanting impurities for forming a first conductivity type region in a surface layer of the second conductivity type well region; conducting heat treatment to activate the impurities introduced by ion implantation, so as to form a first conductivity type source region and a first conductivity type drain region; implanting impurities for forming a second conductivity type region in a flattened surface layer of the first conductivity type silicon carbide substrate, conducting heat treatment to activate the impurities introduced by ion implantation, so as to form a second first conductivity type source region and a second conductivity type drain region; forming an oxide film on the surface of the substrate by thermal oxidation; forming gate electrode layers on the oxide film; and forming electrodes which are in contact with the first conductivity type source region, first conductivity type drain region, second conductivity type source region, and the second conductivity type drain region.
Claim 13
Independent Claim
253 words
A method for manufacturing a CMOS semiconductor device, comprising the steps of: covering a portion of a first conductivity type silicon carbide substrate with a mask, and forming a recessed portion to a predetermined depth by etching; growing a second conductivity type epitaxial layer on the substrate; flattening at least a part of the substrate by removing a surface portion of the substrate including a part of the epitaxial layer grown thereon, so that a pn junction appears on the surface of the substrate, and so that the second conductivity type epitaxial layer is formed into a second conductivity type well region; implanting impurities for forming a first conductivity type region in a surface layer of the second conductivity type well region; conducting heat treatment to activate the impurities introduced by ion implantation, so as to form a first conductivity type source region and a first conductivity type drain region; implanting impurities for forming a second conductivity type region in a flattened surface layer of the first conductivity type silicon carbide substrate, conducting heat treatment to activate the impurities introduced by ion implantation, so as to form a second first conductivity type source region and a second conductivity type drain region; forming an oxide film on the surface of the substrate by thermal oxidation; forming gate electrode layers on the oxide film; and forming electrodes which are in contact with the first conductivity type source region, first conductivity type drain region, second conductivity type source region, and the second conductivity type drain region.
Claim 14
Independent Claim
27 words
A method for manufacturing a silicon carbide semiconductor device according to any one of claims 1-10, wherein the surface of the substrate is flattened by mechanical polishing.
Claim 15
Independent Claim
29 words
A method for manufacturing a silicon carbide semiconductor device according to any one of claims 1-10, wherein the surface of the substrate is flattened by dry etching using plasma.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2003-08-01 | 2004-01-31 | 2004-08-01 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2007-08-01 | 2008-01-31 | 2008-08-01 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2011-08-01 | 2012-01-31 | 2012-08-01 | $7700.00 | Window Closed / Lapsed |