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US6091076A
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Quantum WELL MOS transistor and methods for making same
Assignee: Commissariat à l'Énergie Atomique et Aux Énergies Alternatives
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Filing: 1997-06-13
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Granted: 2000-07-18
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Expires: 2017-06-13
Abstract
Abstract A new quantum well MOS transistor is described along with a processes for manufacturing it. In this transistor, the source and drain areas are separated from the channel by sufficiently thin insulating layers to enable the passage of charge carriers by the tunnel effect. Each of the source and drain areas is separated from the substrate by an electrically insulating layer that is sufficiently thick to prevent charge carriers from passing through this insulating layer.
Inventors
- 👤 Simon Deleonibus
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-29 16:58
CPC Classifications
H; H10; H10D; H10D30/00; H10D30/40; H10D30/402; B; B82; B82Y; B82Y10/00; H10D30/01; H10D30/021; H10D30/027; H10D30/0277; H10D30/031; H10D30/0321; H10D30/0323; H10D30/60; H10D30/67; H10D30/6704; H10D30/6713; H10D30/6757; H10D62/00; H10D62/01; H10D62/021; H10D62/10; H10D62/113; H10D62/115; H10D62/116; H10D62/13; H10D62/149; H10D62/151; H10D62/165
Claims Analysis
Total Claims: 19
Claim 1
Independent Claim
137 words
MOS type transistor comprising: a semiconductor substrate, a grid area, a semiconductor channel located under the grid area and electrically insulated from it, and a source area and a drain area that are located on each side of the grid area and the channel and which are electrically insulated from the substrate and the grid area, said transistor being characterized in that the source and drain areas are separated from the channel by electrically insulating layers respectively that are sufficiently thin to enable charge carriers to pass by means of the tunnel effect from the source area to the drain area through the channel, and in that each of the source and drain areas is separated from the substrate by an electrically insulating layer sufficiently thick to prevent any passage of charge carriers through the insulating layer.
Claim 2
Dependent Claim
137 words
MOS type transistor comprising: a semiconductor substrate, a grid area, a semiconductor channel located under the grid area and electrically insulated from it, and a source area and a drain area that are located on each side of the grid area and the channel and which are electrically insulated from the substrate and the grid area, said transistor being characterized in that the source and drain areas are separated from the channel by electrically insulating layers respectively that are sufficiently thin to enable charge carriers to pass by means of the tunnel effect from the source area to the drain area through the channel, and in that each of the source and drain areas is separated from the substrate by an electrically insulating layer sufficiently thick to prevent any passage of charge carriers through the insulating layer.
Claim 3
Dependent Claim
23 words
MOS type transistor according to claim 1, characterized in that each of the source and drain areas is made of a metallic material.
Claim 4
Dependent Claim
17 words
MOS type transistor according to claim, characterized in that the channel is electrically insulated from the substrate.
Claim 5
Dependent Claim
32 words
MOS transistor according to claim 1, characterized in that the channel is in electrical contact with the substrate through a narrow area of the substrate, which area is smaller than the channel.
Claim 6
Dependent Claim
19 words
MOS type transistor according to claim 1, characterized in that the substrate and the channel are made of silicon.
Claim 7
Dependent Claim
19 words
MOS type transistor according to claim 5, characterized in that the sufficiently thin insulating layers are made of silica.
Claim 8
Dependent Claim
20 words
MOS type transistor according to claim 5, characterized in that the sufficiently thin insulating layers are made of silicon nitride.
Claim 9
Dependent Claim
29 words
MOS type transistor according to claim 5, characterized in that the insulating layer that separates each of the source and drain areas of the substrate is a silica layer.
Claim 10
Dependent Claim
39 words
MOS type transistor according to claim 1, characterized in that the channel is separated from the substrate by a very thick electrically insulating layer, said insulating layer being sufficiently thick to prevent any direct tunnel effect through the layer.
Claim 11
Dependent Claim
128 words
Process for manufacturing the MOS type transistor according to claim 1, this process being characterized by the following steps: a structure is formed comprising a substrate, an active area and two field insulation areas on each side of the active area, and a grid area, two recesses are formed in the substrate, one between one of the field insulation areas and the grid area, and the other between the grid area and the other field insulation area, the flanks of the recesses closest to the grid area being located under the grid area, the sufficiently thin insulating layers are formed on the flanks and the sufficiently thick insulating areas are formed at the bottom of the recesses, and the source and drain areas are formed in the recesses.
Claim 12
Dependent Claim
75 words
Process according to claim 10 in which the substrate and the channel are made of silicon and the insulating layer that separates each of the substrate source and drain areas is a silica layer and the sufficiently thin insulating areas are formed first and the silica layers are then formed by doping substrate areas at the bottom of the recesses by impurities enabling fast oxidation of the substrate and then oxidizing the areas thus doped.
Claim 13
Dependent Claim
20 words
Process according to claim 11, characterized in that the sufficiently thin insulating layers are made of silica or silicon nitride.
Claim 14
Dependent Claim
91 words
Process according to claim 10 in which the substrate and the channel are made of silicon and the insulating layer that separates each of the substrate source and drain areas is a silica layer and the sufficiently thin insulating layers and the silica layers are formed by depositing silicon nitride in the recesses, the nitride thus deposited is eliminated except on the flanks so as to form the sufficiently thin insulating layers, and the substrate areas at the bottom of the recesses are oxidized so as to form the silica layers.
Claim 15
Dependent Claim
101 words
Process according to claim 10 in which the substrate and the channel are made of silicon and the insulating layer that separates each of the substrate source and drain areas is a silica layer and the sufficiently thin insulating layers and the silica layers are formed by depositing silicon nitride in the recesses, eliminating the nitride thus depositing except on the flanks, the substrate areas at the bottom of the recesses are oxidized so as to form the silica layers, the nitride from the flanks is eliminated and these flanks are oxidized so as to form the sufficiently thin insulating layers.
Claim 16
Dependent Claim
129 words
Process for manufacturing the MOS type transistor according to claim 9, the process being characterized by the following steps: a structure is formed comprising the substrate, a very thick insulating layer, a semiconductor layer above the very thick insulating layer, an active area and two field insulation areas on each side of the active area, and the grid area, two recesses are formed in the semiconductor layer, one between one of the field insulation areas and the grid area, and the other between the grid area and the other field insulation area, the flanks of the recesses closest to the grid area being located under the grid area, the sufficiently thin layers are formed on the flanks, and the source and the drain areas are formed in the recesses.
Claim 17
Dependent Claim
40 words
Process according to claim 15 in which the substrate and the channel are made of silicon, and the very thick layer is made of silica, characterized in that the sufficiently thin insulation layers are made of silica or silicon nitride.
Claim 18
Dependent Claim
54 words
Process according to claim 15 in which the substrate and the channel are made of silicon, and the very thick layer is made of silica characterized in that the sufficiently thin insulation layers are formed by depositing silicon nitride in the recesses, and the nitride thus deposited is eliminated except on the said flanks.
Claim 19
Dependent Claim
21 words
MOS Type transistor according to claim 1 further comprising a non-volatile memory, the channel of said transistor being a closed volume.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2003-07-18 | 2004-01-17 | 2004-07-18 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2007-07-18 | 2008-01-17 | 2008-07-18 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2011-07-18 | 2012-01-17 | 2012-07-18 | $7700.00 | Window Closed / Lapsed |