Integrated circuit including inverted dielectric isolation

Claim 1

An integrated-circuit (IC) chip of the type including a semiconductor section with a plurality of devices contained in corresponding respective device regions laterally disposed throughout the section; a first layer of insulating material underlying the semiconductor section; an interconnect section underlying the semiconductor section and selectively connecting ones of the plurality of devices with a plurality of conductive traces; a second layer of insulating material underlying the interconnect section, a bonding layer underlying the second insulating layer and supporting the first and second insulating layers, the interconnect section, and the device regions; the semiconductor section being formed with a plurality of first trenches between at least certain of the device regions and extending from the IC surface down through the semiconductor section to the first layer of insulating material; at least one additional trench formed in the IC and arranged to extend down through the semiconductor section and through the underlying first insulating layer to penetrate the interconnect section exposing at least one of the conductive traces of the interconnect section; and a metallization layer overlying a portion of the surface of at least one of the device regions of the semiconductor section.