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US6083796A
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Semiconductor device and method for fabricating the same
Assignee: SK Hynix Inc
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Filing: 1998-07-20
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Granted: 2000-07-04
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Expires: 2018-07-20
Abstract
Abstract A semiconductor device and a method for fabricating the same are disclosed that reduce short channel effects to improve device characteristics. The semiconductor device includes a gate insulating film formed on a semiconductor substrate, a gate electrode formed on the gate insulating film and a lightly doped region formed in the semiconductor substrate at both sides of the gate electrode. A sidewall insulating film is formed at both sides of the gate electrode and a heavily doped impurity region is formed in the semiconductor substrate extending from the sidewall insulating film. Further, an insulating film is formed at sides of the heavily doped impurity region. The insulating film prevents impurity ions from the heavily doped impurity region from diffusing into the channel region of the device.
Inventors
- 👤 Sung Kye Park
- 👤 Eun Jeong Shin
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-08 14:04
CPC Classifications
H; H10; H10D; H10D30/00; H10D30/01; H10D30/021; H10D30/0223; H10D30/0227; H10P; H10P10/00; H10D62/00; H10D62/10; H10D62/113; H10D62/115; H10D62/116
Claims Analysis
Total Claims: 16
Claim 1
Independent Claim
120 words
A method for fabricating a semiconductor device comprising the steps of: forming insulating films on a semiconductor substrate having prescribed dimensions and separated by a prescribed distance; forming a semiconductor layer on an entire surface of the semiconductor substrate including the insulating films; forming a gate over the semiconductor substrate between pairs of the insulating films; forming a lightly doped impurity region in a surface of the semiconductor layer at both sides of the gate; forming a first sidewall insulating film at both sides of the gate; and forming heavily doped impurity regions in the semiconductor layer at both sides of the first sidewall insulating film, the heavily doped impurity regions being isolated from each other by the insulating film.
Claim 2
Independent Claim
120 words
A method for fabricating a semiconductor device comprising the steps of: forming insulating films on a semiconductor substrate having prescribed dimensions and separated by a prescribed distance; forming a semiconductor layer on an entire surface of the semiconductor substrate including the insulating films; forming a gate over the semiconductor substrate between pairs of the insulating films; forming a lightly doped impurity region in a surface of the semiconductor layer at both sides of the gate; forming a first sidewall insulating film at both sides of the gate; and forming heavily doped impurity regions in the semiconductor layer at both sides of the first sidewall insulating film, the heavily doped impurity regions being isolated from each other by the insulating film.
Claim 3
Dependent Claim
31 words
The method of claim 1, wherein the forming the gate step comprises: forming a gate insulating film over the semiconductor substrate; and forming a gate electrode on the gate insulating film.
Claim 4
Dependent Claim
52 words
The method of claim 1, wherein the lightly doped region is between the first sidewall insulating film and the insulating films, and wherein the first sidewall insulating film contacts an upper surface of the lightly doped impurity regions and the insulating films contact a bottom surface of the lightly doped impurity regions.
Claim 5
Dependent Claim
36 words
The method of claim 1, wherein the insulating films are an oxide film, and wherein the heavily doped impurity regions are formed by ion-implantation using the first sidewall insulating film and the gate as a mask.
Claim 6
Dependent Claim
19 words
The method of claim 1, wherein the semiconductor layer is epitaxially grown using the semiconductor substrate as a seed.
Claim 7
Dependent Claim
97 words
The method of claim 1, wherein the forming the insulating films step comprises: etching the semiconductor substrate at both sides of the gate to a predetermined depth from a top surface to form a trench; forming an initial insulating film on the surface of the semiconductor substrate in which the trench is formed; forming a second sidewall insulating film at both sides of the gate and the trench; selectively removing the initial insulating film using the gate and the second sidewall insulating film as masks to form the insulating films; and removing the second sidewall insulating film.
Claim 8
Dependent Claim
18 words
The method of claim 1, wherein the gate is formed on the semiconductor layer over the semiconductor substrate.
Claim 9
Dependent Claim
39 words
The method of claim 1, wherein the forming the insulating films step comprises: forming a patterned layer on the semiconductor substrate; forming a second sidewall insulating film at sides of the patterned insulating layer; and removing the patterned layer.
Claim 10
Independent Claim
151 words
A method for fabricating a semiconductor device comprising the steps of: forming a gate insulating film and a gate electrode on a semiconductor substrate; etching the semiconductor substrate at both sides of the gate electrode to a predetermined depth from a top surface to form a trench; forming an insulating film on the semiconductor substrate in the trench; forming a first sidewall insulating film at both sides of the gate electrode, the gate insulating film and the trench; selectively removing portions of the insulating film using the gate electrode and the first sidewall insulating film as masks; removing the first sidewall insulating film; forming a semiconductor layer on the entire surface of the semiconductor substrate including the insulating film; and forming heavily doped impurity regions in the semiconductor layer at both sides of the gate electrode, wherein the heavily doped impurity regions are isolated from each other by the insulating film.
Claim 11
Independent Claim
151 words
A method for fabricating a semiconductor device comprising the steps of: forming a gate insulating film and a gate electrode on a semiconductor substrate; etching the semiconductor substrate at both sides of the gate electrode to a predetermined depth from a top surface to form a trench; forming an insulating film on the semiconductor substrate in the trench; forming a first sidewall insulating film at both sides of the gate electrode, the gate insulating film and the trench; selectively removing portions of the insulating film using the gate electrode and the first sidewall insulating film as masks; removing the first sidewall insulating film; forming a semiconductor layer on the entire surface of the semiconductor substrate including the insulating film; and forming heavily doped impurity regions in the semiconductor layer at both sides of the gate electrode, wherein the heavily doped impurity regions are isolated from each other by the insulating film.
Claim 12
Dependent Claim
63 words
The method of claim 9, further comprising: forming a lightly doped impurity region in a surface of the semiconductor layer at both sides of the gate electrode; and forming a second sidewall insulating film at both sides of the gate electrode, wherein the heavily doped impurity regions are formed by ion-implantation using the second sidewall insulating film and the gate as a mask.
Claim 13
Dependent Claim
59 words
The method of claim 10, wherein the insulating films are an oxide film, where in the lightly doped region is between the second sidewall insulating film and the insulating film, and wherein the second sidewall insulating film contacts an upper surface of the lightly doped region and the insulating film contacts a bottom surface of the lightly doped region.
Claim 14
Dependent Claim
19 words
The method of claim 9, wherein the semiconductor layer is epitaxially grown using the semiconductor substrate as a seed.
Claim 15
Dependent Claim
15 words
The method of claim 9, wherein the trench is formed by overetching the gate electrode.
Claim 16
Dependent Claim
20 words
The method of claim 9, wherein the heavily doped impurity regions are formed in a surface of the semiconductor layer.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2003-07-04 | 2004-01-03 | 2004-07-04 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2007-07-04 | 2008-01-03 | 2008-07-04 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2011-07-04 | 2012-01-03 | 2012-07-04 | $7700.00 | Window Closed / Lapsed |