Patent US3826659A successfully refreshed from Google Patents.
Patent US6083275A successfully refreshed from Google Patents.
US6083275A
Expired / Lapsed
US
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Optimized phase shift design migration
Assignee: GlobalFoundries Inc
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Filing: 1998-01-09
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Granted: 2000-07-04
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Expires: 2018-01-09
Abstract
Abstract A method for converting an integrated circuit design to a phase-shift complaint mask design. The method comprises the steps of locating features of the integrated circuit that violate predetermined design criteria converting error flags to physical marker shapes, modifying the located features using layout modification system technology based on a predetermined cost constraint, determining if all violations are corrected, and either changing the cost constraint to a higher cost constraint if violations still exist and repeating the process or terminating the conversion if all violations are corrected.
Inventors
- 👤 Fook-Luen Heng
- 👤 Lars W. Liebmann
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-08 19:40
CPC Classifications
G; G03; G03F; G03F1/00; G03F1/26; G06; G06F; G06F30/00; G06F30/30; G06F30/39; G06F30/398
Claims Analysis
Total Claims: 22
Claim 1
Independent Claim
89 words
A method for converting an integrated circuit design to a phase-shift compliant mask design, the method comprising the steps of: (a) locating features of the integrated circuit that violate predetermined design criteria; (b) modifying the features located in Step (a) based on a predetermined cost constraint; (c) determining if the Step (b) corrected all violations determined in the Step (a), changing the cost constraint to a further cost constraint if violations still exist and terminating the conversion if the violations are corrected; and (d) repeating steps (b) and (c).
Claim 2
Independent Claim
89 words
A method for converting an integrated circuit design to a phase-shift compliant mask design, the method comprising the steps of: (a) locating features of the integrated circuit that violate predetermined design criteria; (b) modifying the features located in Step (a) based on a predetermined cost constraint; (c) determining if the Step (b) corrected all violations determined in the Step (a), changing the cost constraint to a further cost constraint if violations still exist and terminating the conversion if the violations are corrected; and (d) repeating steps (b) and (c).
Claim 3
Independent Claim
82 words
A method for optimizing an integrated circuit design comprising the steps of: (a) loading a layout of the integrated circuit into a shape generator; (b) initializing design constraints in the shape generator; (c) determining if the layout violates the design constraints; (d) modifying the layout based on the result of Step (c); and (e) repeating Steps (c) and (d) until Step (c) determines that the layout does not violate the design constraints, wherein the design constraint is based upon a cost constraint.
Claim 4
Independent Claim
82 words
A method for optimizing an integrated circuit design comprising the steps of: (a) loading a layout of the integrated circuit into a shape generator; (b) initializing design constraints in the shape generator; (c) determining if the layout violates the design constraints; (d) modifying the layout based on the result of Step (c); and (e) repeating Steps (c) and (d) until Step (c) determines that the layout does not violate the design constraints, wherein the design constraint is based upon a cost constraint.
Claim 5
Dependent Claim
23 words
The method according to claim 2, wherein the Step (c) comprises the further step of (c1) generating marker shapes to indicate a violation.
Claim 6
Dependent Claim
27 words
The method according to claim 3, wherein the marker shapes indicate at least one of a location of a conflict and a spatial extent of the conflict.
Claim 7
Dependent Claim
49 words
The method according to claim 3, wherein the marker shapes are at least one of: i) error vectors indicating violations of phase shiftability design rules in the original design; ii) error vectors based on phase conflicts; and iii) error vectors based on design violations in the phase shapes created.
Claim 8
Dependent Claim
29 words
The method according to claim 3, wherein the Step (c1) comprises the further step of (c2) terminating the optimization if Step (c) determines that a violation does not exist.
Claim 9
Dependent Claim
125 words
The method according to claim 3, wherein the cost constraint is at least one of: i) expanding the marker shapes; ii) moving the marker shapes within an original size of the design; iii) expanding the marker shapes within an original size of the design; iv) moving the marker shapes within predefined areas of the design without increasing the size of the design; v) expanding the marker shapes within predefined areas of the design without increasing the size of the design; vi) moving the marker shapes within predefined areas of the design and increasing the size of the design within a predetermined percentage; and vii) expanding the marker shapes within predefined areas of the design and increasing the size of the design within a predetermined percentage.
Claim 10
Dependent Claim
31 words
The method according to claim 2, wherein the Step (d) comprises the steps of: (d1) modifying the layout in a first direction; and (d2) modifying the layout in a second direction.
Claim 11
Dependent Claim
16 words
The method according to claim 8, wherein the second direction is orthogonal to the first direction.
Claim 12
Dependent Claim
26 words
The method according to claim 2, wherein the Step (d) modifies the design with respect to a width of a design feature of the integrated circuit.
Claim 13
Dependent Claim
25 words
The method according to claim 2, wherein the Step (d) modifies the design with respect to a distance between design features of the integrated circuit.
Claim 14
Dependent Claim
23 words
The method according to claim 1, wherein the Step (a) comprises the further step of (a1) generating marker shapes to indicate the violation.
Claim 15
Dependent Claim
27 words
The method according to claim 12, wherein the marker shapes indicate at least one of a location of a conflict and a spatial extent of the conflict.
Claim 16
Dependent Claim
49 words
The method according to claim 12, wherein the marker shapes are at least one of: i) error vectors indicating violations of phase shiftability design rules in the original design; ii) error vectors based on phase conflicts; and iii) error vectors based on design violations in the phase shapes created.
Claim 17
Dependent Claim
29 words
The method according to claim 12, wherein the Step (a1) comprises the further step of (a2) terminating the optimization if Step (a) determines that a violation does not exist.
Claim 18
Dependent Claim
125 words
The method according to claim 12, wherein the cost constraint is at least one of: i) expanding the marker shapes; ii) moving the marker shapes within an original size of the design; iii) expanding the marker shapes within an original size of the design; iv) moving the marker shapes within predefined areas of the design without increasing the size of the design; v) expanding the marker shapes within predefined areas of the design without increasing the size of the design; vi) moving the marker shapes within predefined areas of the design and increasing the size of the design within a predetermined percentage; and vii) expanding the marker shapes within predefined areas of the design and increasing the size of the design within a predetermined percentage.
Claim 19
Dependent Claim
31 words
The method according to claim 1, wherein the Step (b) comprises the steps of: (b1) modifying the design in a first direction; and (b2) modifying the design in a second direction.
Claim 20
Dependent Claim
16 words
The method according to claim 16, wherein the second direction is orthogonal to the first direction.
Claim 21
Dependent Claim
26 words
The method according to claim 1, wherein the Step (b) modifies the features with respect to a width of a design feature of the integrated circuit.
Claim 22
Dependent Claim
25 words
The method according to claim 1, wherein the Step (b) modifies the features with respect to a distance between design features of the integrated circuit.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2003-07-04 | 2004-01-03 | 2004-07-04 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2007-07-04 | 2008-01-03 | 2008-07-04 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2011-07-04 | 2012-01-03 | 2012-07-04 | $7700.00 | Window Closed / Lapsed |