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US6073501A
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Apparatus and method for semiconductor wafer processing which facilitate determination of a source of contaminants or defects
Assignee: Advanced Micro Devices Inc
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Filing: 1997-06-20
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Granted: 2000-06-13
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Expires: 2017-06-20
Abstract
Abstract An apparatus and method are presented for performing a wafer fabrication operation upon each of a plurality of semiconductor wafers which facilitate determination of a source of semiconductor wafer contaminants or defects. A wafer fabrication tool of the present invention includes a process chamber for processing a semiconductor wafer and a wafer handling system for transporting the semiconductor wafer between a wafer cassette and the process chamber. Semiconductor wafers contained within the wafer cassette are assigned numbers and processed one after another in a predetermined order. The wafer handling system is configurable to remove semiconductor wafers from the wafer cassette for processing in the predetermined order. One embodiment of the wafer handling system includes a mechanical hand for gripping a semiconductor wafer and a mechanical arm coupled to the mechanical hand for positioning the mechanical hand. The process chamber of the wafer fabrication tool may be, for example, a deposition chamber, an etch chamber, a spin coat chamber, a furnace, a diffusion chamber, an oxidation chamber, or an ion implantation chamber. In the present method, a unique wafer processing order is selected for each wafer fabrication tool, and each wafer fabrication tool is configured to implement the corresponding wafer processing sequence. Graphs of the number of contaminants (or defects) in the wafers verses wafer number generated for each of the wafer processing sequences may be analyzed to determine if one wafer fabrication tool introduced more contaminants into the wafers than the other wafer fabrication tools.
Inventors
- 👤 Don R. Rohner
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-02 20:39
CPC Classifications
H; H10; H10P; H10P72/00; H10P72/06; H10P72/0616; G; G01; G01N; G01N21/00; G01N21/84; G01N21/88; G01N21/94; G01N21/95; G01N21/9501
Claims Analysis
Total Claims: 18
Claim 1
Independent Claim
126 words
A wafer fabrication system, comprising: a wafer cassette configured to hold a plurality of semiconductor wafers; a plurality of wafer fabrication tools configured to receive said wafer cassette and to process said plurality of semiconductor wafers, wherein each one of said plurality of wafer fabrication tools is configured to process said plurality of semiconductor wafers in a different order than the other ones of said plurality of wafer fabrication tools, wherein an original order of said plurality of semiconductor wafers is maintained in said wafer cassette during processing by said plurality of wafer fabrication tools; and a measurement system configured to determine a quantity of contaminants or defects present upon each of said plurality of semiconductor wafers after processing by said plurality of wafer fabrication tools.
Claim 2
Dependent Claim
126 words
A wafer fabrication system, comprising: a wafer cassette configured to hold a plurality of semiconductor wafers; a plurality of wafer fabrication tools configured to receive said wafer cassette and to process said plurality of semiconductor wafers, wherein each one of said plurality of wafer fabrication tools is configured to process said plurality of semiconductor wafers in a different order than the other ones of said plurality of wafer fabrication tools, wherein an original order of said plurality of semiconductor wafers is maintained in said wafer cassette during processing by said plurality of wafer fabrication tools; and a measurement system configured to determine a quantity of contaminants or defects present upon each of said plurality of semiconductor wafers after processing by said plurality of wafer fabrication tools.
Claim 3
Dependent Claim
61 words
The system as recited in claim 1, further comprising a computational device configured to receive said quantity from said measurement system for each of said plurality of semiconductor wafers and to determine which one of said plurality of wafer fabrication tools may have introduced more contaminants or defects than any of the other ones of said plurality of wafer fabrication tools.
Claim 4
Dependent Claim
51 words
The system as recited in claim 2, wherein said computational device is configured to order said quantity for each of said plurality of semiconductor wafers in increasing order and compare that order to each different order that said plurality of semiconductor wafers was processed by said plurality of wafer fabrication tools.
Claim 5
Dependent Claim
136 words
The system as recited in claim 1, wherein each one of said plurality of wafer fabrication tools comprises: a process chamber; a wafer handling system configured to transfer ones of said plurality of semiconductor wafers from said wafer cassette to said process chamber; and a control unit configured to control the order in which said wafer handling system transfers ones of said plurality of semiconductor wafers from said wafer cassette to said process chamber, wherein said control unit is programmed to control said wafer handling system so that said plurality of semiconductor wafers are transferred from said wafer cassette to said process chamber in a different order than in the other ones of said plurality of wafer fabrication tools, and wherein said original order of said plurality of semiconductor wafers is maintained in said wafer cassette.
Claim 6
Dependent Claim
24 words
The system as recited in claim 4, wherein the process chamber for one of said plurality of wafer fabrication tools comprises a deposition chamber.
Claim 7
Dependent Claim
24 words
The system as recited in claim 4, wherein the process chamber for one of said plurality of wafer fabrication tools comprises an etch chamber.
Claim 8
Dependent Claim
25 words
The system as recited in claim 4, wherein the process chamber for one of said plurality of wafer fabrication tools comprises a spin coat chamber.
Claim 9
Dependent Claim
24 words
The system as recited in claim 4, wherein the process chamber for one of said plurality of wafer fabrication tools comprises a heating chamber.
Claim 10
Dependent Claim
24 words
The system as recited in claim 4, wherein the process chamber for one of said plurality of wafer fabrication tools comprises a diffusion chamber.
Claim 11
Dependent Claim
24 words
The system as recited in claim 4, wherein the process chamber for one of said plurality of wafer fabrication tools comprises an oxidation chamber.
Claim 12
Dependent Claim
24 words
The system as recited in claim 4, wherein the process chamber for one of said plurality of wafer fabrication tools comprises an implantation chamber.
Claim 13
Dependent Claim
44 words
The system as recited in claim 1, wherein said different order is selected randomly so long as said different order for each one of said plurality of wafer fabrication tools is different than for the other ones of said plurality of wafer fabrication tools.
Claim 14
Dependent Claim
133 words
A wafer fabrication method, comprising: processing a group of semiconductor wafers from a wafer cassette in a plurality of wafer fabrication tools, wherein said group of semiconductor wafers is processed in a different order for each one of said plurality of wafer fabrication tools than for the other ones of said plurality of wafer fabrication tools; maintaining an original order of said group of semiconductor wafers in said wafer cassette during said processing for all of said plurality of wafer fabrication tools; and measuring a quantity of contaminants or defects present upon each of said group of semiconductor wafers after said processing; and determining which one of said plurality of wafer fabrication tools may have introduced more contaminants or defects than any of the other ones of said plurality of wafer fabrication tools.
Claim 15
Dependent Claim
133 words
A wafer fabrication method, comprising: processing a group of semiconductor wafers from a wafer cassette in a plurality of wafer fabrication tools, wherein said group of semiconductor wafers is processed in a different order for each one of said plurality of wafer fabrication tools than for the other ones of said plurality of wafer fabrication tools; maintaining an original order of said group of semiconductor wafers in said wafer cassette during said processing for all of said plurality of wafer fabrication tools; and measuring a quantity of contaminants or defects present upon each of said group of semiconductor wafers after said processing; and determining which one of said plurality of wafer fabrication tools may have introduced more contaminants or defects than any of the other ones of said plurality of wafer fabrication tools.
Claim 16
Dependent Claim
48 words
The method as recited in claim 13, wherein said determining comprises: ordering said quantity for each of said group of semiconductor wafers in increasing order; and comparing that order to each different order that said group of semiconductor wafers was processed by said plurality of wafer fabrication tools.
Claim 17
Dependent Claim
106 words
The method as recited in claim 13, further comprising, prior to said processing, programming a control unit for each of said plurality of wafer fabrication tools to control a wafer handling system for each of said plurality of wafer fabrication tools so that said group of semiconductor wafers are transferred during said processing from said wafer cassette to a process chamber for each of said plurality of wafer fabrication tools in a different order than in the other ones of said plurality of wafer fabrication tools, and wherein said original order of said group of semiconductor wafers is maintained in said wafer cassette during said processing.
Claim 18
Dependent Claim
44 words
The method as recited in claim 13, further comprising selecting said different order randomly so long as said different order for each one of said plurality of wafer fabrication tools is different than for the other ones of said plurality of wafer fabrication tools.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2003-06-13 | 2003-12-13 | 2004-06-13 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2007-06-13 | 2007-12-13 | 2008-06-13 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2011-06-13 | 2011-12-13 | 2012-06-13 | $7700.00 | Window Closed / Lapsed |