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Multi-chip module having an integral capacitor element

Assignee: Harris Corp
•
Filing: 1998-04-28
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Granted: 2000-05-09
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Expires: 2018-04-28
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Abstract

Abstract A multi-chip module has an integral capacitor element embedded within the substrate and includes a plurality of substrate layers forming a multi-chip module substrate. The substrate has a cut edge and forms at the cut edge a bondable edge. A via is formed in the substrate, and a dielectric capacitive material fills the via for a plurality of substrate layers and defines a multilayer capacitor. The multilayer capacitor and via are positioned at the bondable edge and connects to the bondable edge. In one aspect, the via having the dielectric capacitive material is positioned at the cut edge, and includes a conductive material filling at least a portion of the cut via to form the bondable edge. The dielectric capacitive material and bondable edge form a junction surface. A signal trace can be formed on a substrate layer and connected to the capacitor to form a DC blocking capacitor structure. A ground line can be formed on one substrate layer and engage the capacitive material. A signal trace can be formed on one of the substrate layers and engage the bondable edge to define a decoupling capacitor structure.

Inventors

  • 👤 Edward G. Palmer
  • 👤 Charles M. Newton

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-08 16:24
CPC Classifications
H; H10; H10W; H10W70/00; H10W70/60; H10W70/611; H05; H05K; H05K1/00; H05K1/16; H05K1/162; H10W70/62; H10W70/63; H10W70/635; H05K1/02; H05K1/03; H05K1/0306; H05K1/09; H05K1/092; H05K2201/00; H05K2201/01; H05K2201/0183; H05K2201/0187; H05K2201/09; H05K2201/09145; H05K2201/0919; H05K3/00; H05K3/0011; H05K3/0044; H05K3/0052; H05K3/40; H05K3/4038; H05K3/4053; Y; Y10; Y10T; Y10T29/00; Y10T29/43; Y10T29/435

Claims Analysis

Total Claims: 49
Claim 1
Independent Claim 95 words
A multi-chip module having an integral capacitor element comprising: a plurality of substrate layers forming a multi-chip module substrate; at least one via formed in the multi-chip substrate; a conductive material filling a portion of said via; and a dielectric capacitive material filling said via for said plurality of substrate layers and engaging said conductive material within said via to define a multilayer capacitor, wherein said substrate has a cut edge that extends through at least a portion of said via for exposing said conductive material that fills said via to define a bondable edge.
Claim 2
Dependent Claim 95 words
A multi-chip module having an integral capacitor element comprising: a plurality of substrate layers forming a multi-chip module substrate; at least one via formed in the multi-chip substrate; a conductive material filling a portion of said via; and a dielectric capacitive material filling said via for said plurality of substrate layers and engaging said conductive material within said via to define a multilayer capacitor, wherein said substrate has a cut edge that extends through at least a portion of said via for exposing said conductive material that fills said via to define a bondable edge.
Claim 3
Dependent Claim 26 words
A multi-chip module according to claim 1, wherein said cut edge extends through said via off-center to aid in retaining said conductive material within said via.
Claim 4
Dependent Claim 25 words
A multi-chip module according to claim 1, wherein said cut edge extends through said capacitive material to form an exposed edge of said capacitive material.
Claim 5
Dependent Claim 22 words
A multi-chip module according to claim 3, and further comprising a cap structure positioned on the exposed edge of said capacitive material.
Claim 6
Dependent Claim 27 words
A multi-chip module according to claim 1, and further comprising a signal trace formed on one of said layers and engaging said conductive material within said via.
Claim 7
Dependent Claim 20 words
A multi-chip module according to claim 1, wherein said conductive material filling said via comprises a gold and glass binder.
Claim 8
Dependent Claim 17 words
A multi-chip module according to claim 1, wherein said plurality of substrate layers are formed from ceramic.
Claim 9
Dependent Claim 27 words
A multi-chip module according to claim 1, and further comprising a ground line formed on one of said plurality of substrate layers and engaging said capacitive material.
Claim 10
Dependent Claim 17 words
A multi-chip module according to claim 1, wherein said capacitive material comprises a high dielectric constant material.
Claim 11
Dependent Claim 19 words
A multi-chip module according to claim 9, wherein said high dielectric material is about 10,000 to about 20,000 constant.
Claim 12
Dependent Claim 19 words
A multi-chip module according to claim 9, wherein said high dielectric constant material has about 100,000 to about 200,000.
Claim 13
Dependent Claim 20 words
A multi-chip module according to claim 1, wherein the cut edge defining said bondable edge is about 8 mil square.
Claim 14
Dependent Claim 96 words
A multi-chip module having an integral capacitor element comprising: a plurality of substrate layers forming a multi-chip module substrate, said multi-chip module substrate having a cut edge; a via formed in the multi-chip module substrate adjacent the cut edge; a dielectric capacitive material forming at least two layers and filling said via for said plurality of substrate layers and defining a multilayer capacitor; means formed on said cut edge and defining a bondable edge; means electrically interconnecting said bondable edge and capacitive material; and means connecting said at least two layers of said dielectric capacitive material.
Claim 15
Dependent Claim 96 words
A multi-chip module having an integral capacitor element comprising: a plurality of substrate layers forming a multi-chip module substrate, said multi-chip module substrate having a cut edge; a via formed in the multi-chip module substrate adjacent the cut edge; a dielectric capacitive material forming at least two layers and filling said via for said plurality of substrate layers and defining a multilayer capacitor; means formed on said cut edge and defining a bondable edge; means electrically interconnecting said bondable edge and capacitive material; and means connecting said at least two layers of said dielectric capacitive material.
Claim 16
Dependent Claim 20 words
A multi-chip module according to claim 13, wherein said means connecting at least two layers further comprises a conductive via.
Claim 17
Dependent Claim 19 words
A multi-chip module according to claim 13, wherein said capacitor defines an upper and lower portion within said via.
Claim 18
Dependent Claim 43 words
A multi-chip module according to claim 15, and further comprising a signal trace formed on one of said plurality of substrate layers and connected to one of either said upper or lower portions of said capacitor to form a DC blocking capacitor structure.
Claim 19
Dependent Claim 56 words
A multi-chip module according to claim 15, and further comprising a ground line formed on one of said substrate layers and connected to one of either said upper or lower portions of said capacitor, and a signal trace formed on one of said substrate layers and engaging said bondable edge to define a decoupling capacitor structure.
Claim 20
Dependent Claim 19 words
A multi-chip module according to claim 13, and further comprising a post-fired bond pad formed on said bondable edge.
Claim 21
Dependent Claim 38 words
A multi-chip module according to claim 13, wherein said means formed on said cut edge and defining a bondable edge comprises a solid conductive via that has been cut to expose solid conductive material within said conductive via.
Claim 22
Dependent Claim 27 words
A multi-chip module according to claim 19, wherein said solid conductive via has been cut off-center to aid in retaining said conductive material within said conductive via.
Claim 23
Dependent Claim 22 words
A multi-chip module according to claim 19, wherein said conductive material filling said solid conductive via comprises a gold and glass binder.
Claim 24
Dependent Claim 25 words
A multi-chip module according to claim 13, and further comprising a signal trace formed on one of said substrate layers and engaging said bondable edge.
Claim 25
Dependent Claim 17 words
A multi-chip module according to claim 13, wherein said plurality of substrate layers are formed from ceramic.
Claim 26
Dependent Claim 25 words
A multi-chip module according to claim 13, and further comprising a ground line formed on one of said substrate layers and engaging said capacitive material.
Claim 27
Dependent Claim 17 words
A multi-chip module according to claim 13, wherein said capacitive material comprises a high dielectric constant material.
Claim 28
Dependent Claim 19 words
A multi-chip module according to claim 13, wherein said high dielectric constant material is about 10,000 to about 20,000.
Claim 29
Dependent Claim 19 words
A multi-chip module according to claim 13, wherein said high dielectric constant material is about 100,000 to about 200,000.
Claim 30
Dependent Claim 16 words
A multi-chip module according to claim 13, wherein said bondable edge is about 8 mil square.
Claim 31
Dependent Claim 81 words
A multi-chip module having an integral capacitor element comprising: a plurality of substrate layers forming a multi-chip module substrate, said multi-chip module substrate having a cut edge; means formed on said cut edge and defining a bondable edge surface; a via formed in the multi-chip module substrate; a dielectric capacitive material filling said via for said plurality of substrate layers and defining a multilayer capacitor; and means positioned at said bondable edge and connecting said dielectric capacitive material and bondable edge.
Claim 32
Dependent Claim 81 words
A multi-chip module having an integral capacitor element comprising: a plurality of substrate layers forming a multi-chip module substrate, said multi-chip module substrate having a cut edge; means formed on said cut edge and defining a bondable edge surface; a via formed in the multi-chip module substrate; a dielectric capacitive material filling said via for said plurality of substrate layers and defining a multilayer capacitor; and means positioned at said bondable edge and connecting said dielectric capacitive material and bondable edge.
Claim 33
Dependent Claim 55 words
A multi-chip module according to claim 29, wherein said via having said dielectric capacitive material is positioned at said cut edge, and including a conductive material filling at least a portion of said cut via to form said bondable edge, and said means connecting said dielectric capacitive material and bondable edge comprises a junction surface.
Claim 34
Dependent Claim 17 words
A multi-chip module according to claim 30, including a post-fired bond pad formed on the cut edge.
Claim 35
Dependent Claim 37 words
A multi-chip module according to claim 30, wherein said means formed on said cut edge and defining a bondable edge comprises a solid conductive via that has been cut to expose conductive material formed within said via.
Claim 36
Dependent Claim 28 words
A multi-chip module according to claim 32, wherein said solid conductive via has been cut off-center to aid in retaining said conductive material within said solid conductive via.
Claim 37
Dependent Claim 20 words
A multi-chip module according to claim 33, wherein said conductive material filling said via comprises a gold and glass binder.
Claim 38
Dependent Claim 19 words
A multi-chip module according to claim 29, wherein said capacitor defines an upper and lower portion within said via.
Claim 39
Dependent Claim 34 words
A multi-chip module according to claim 29, and further comprising a signal trace formed on one of said plurality of substrate layers and connected to said capacitor to form a DC blocking capacitor structure.
Claim 40
Dependent Claim 47 words
A multi-chip module according to claim 29, and further comprising a ground line formed on one of said substrate layers and engaging said capacitive material, and a signal trace formed on one of said substrate layers and engaging said bondable edge to define a decoupling capacitor structure.
Claim 41
Dependent Claim 25 words
A multi-chip module according to claim 29, wherein said cut edge extends through said capacitive material to form an exposed edge of said capacitive material.
Claim 42
Dependent Claim 28 words
A multi-chip module according to claim 38, wherein said cut edge extending through said capacitive material to form an exposed edge of said capacitive material includes a cap.
Claim 43
Dependent Claim 26 words
A multi-chip module according to claim 29, and further comprising a signal trace formed on one of said multi-chip substrate layers and engaging said bondable edge.
Claim 44
Dependent Claim 16 words
A multi-chip module according to claim 29, wherein said plurality of layers are formed from ceramic.
Claim 45
Dependent Claim 25 words
A multi-chip module according to claim 29, and further comprising a ground line formed on one of said substrate layers and engaging said capacitive material.
Claim 46
Dependent Claim 17 words
A multi-chip module according to claim 29, wherein said capacitive material comprises a high dielectric constant material.
Claim 47
Dependent Claim 19 words
A multi-chip module according to claim 43, wherein said high dielectric constant material is about 10,000 to about 20,000.
Claim 48
Dependent Claim 19 words
A multi-chip module according to claim 43, wherein said high dielectric constant material is about 100,000 to about 200,000.
Claim 49
Dependent Claim 20 words
A multi-chip module according to claim 43, wherein the cut edge defining said bondable edge is about 8 mil square.

References Cited (Backward Citations)

US4622619A Cited
US4771362A Cited
US5160907A Cited
US5134539A Cited
US5583739A Cited
US5384434A Cited
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USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 2003-05-09 2003-11-08 2004-05-09 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2007-05-09 2007-11-08 2008-05-09 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2011-05-09 2011-11-08 2012-05-09 $7700.00 Window Closed / Lapsed

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